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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-03 16:42:24 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-03 16:42:24 +0300
commit8ee5a19240722f397d55f57a426992350f8019a3 (patch)
treee13a9cf1559ea4c65214119373188e17313d8b57 /rtl/modexpng_mmm_dual.v
parentaffada8d5da7426d22035360c3674ab3b3311ab5 (diff)
Expanded micro-operation parameters (added dedicated control bit to force the B input of
the modular multiplier to 1, this is necessary to bring numbers out of Montgomery domain).
Diffstat (limited to 'rtl/modexpng_mmm_dual.v')
-rw-r--r--rtl/modexpng_mmm_dual.v26
1 files changed, 20 insertions, 6 deletions
diff --git a/rtl/modexpng_mmm_dual.v b/rtl/modexpng_mmm_dual.v
index babd565..b9b41e8 100644
--- a/rtl/modexpng_mmm_dual.v
+++ b/rtl/modexpng_mmm_dual.v
@@ -7,6 +7,7 @@ module modexpng_mmm_dual
ladder_mode,
word_index_last,
word_index_last_minus1,
+ force_unity_b,
sel_wide_in, sel_narrow_in,
@@ -70,7 +71,8 @@ module modexpng_mmm_dual
input ladder_mode;
input [7:0] word_index_last;
input [7:0] word_index_last_minus1;
-
+ input force_unity_b;
+
input [BANK_ADDR_W-1:0] sel_wide_in;
input [BANK_ADDR_W-1:0] sel_narrow_in;
@@ -708,13 +710,22 @@ module modexpng_mmm_dual
// DSP Feed Logic
//
reg dsp_merge_xy_b;
+ reg dsp_merge_xy_b_first;
- always @(posedge clk)
+ always @(posedge clk) begin
//
case (fsm_state)
FSM_STATE_MULT_SQUARE_COL_0_TRIG: dsp_merge_xy_b <= 1'b1;
FSM_STATE_MULT_TRIANGLE_COL_0_TRIG: dsp_merge_xy_b <= 1'b0;
endcase
+ //
+ case (fsm_state)
+ FSM_STATE_MULT_SQUARE_COL_0_TRIG,
+ FSM_STATE_MULT_SQUARE_COL_N_TRIG: dsp_merge_xy_b_first <= 1'b1;
+ default: dsp_merge_xy_b_first <= 1'b0;
+ endcase
+ //
+ end
//
// On-the-fly Carry Recombination
@@ -723,6 +734,9 @@ module modexpng_mmm_dual
wire [17:0] rd_narrow_y_dout_carry = rd_narrow_y_dout + {{16{1'b0}}, dsp_xy_b_carry};
wire [17:0] rd_narrow_xy_dout_carry_mux = ladder_mode ? rd_narrow_y_dout_carry : rd_narrow_x_dout_carry;
+ wire [15:0] rd_narrow_xy_dout_carry_mux_or_unity = !force_unity_b ?
+ rd_narrow_xy_dout_carry_mux[15:0] : dsp_merge_xy_b_first ? WORD_ONE : WORD_ZERO;
+
always @(posedge clk)
//
if (narrow_xy_ena_dly2) begin // rewrite
@@ -732,15 +746,15 @@ module modexpng_mmm_dual
dsp_y_b <= rd_narrow_y_dout[15:0];
dsp_xy_b_carry <= 2'b00;
end else begin
- dsp_x_b <= rd_narrow_xy_dout_carry_mux[15:0];
- dsp_y_b <= rd_narrow_xy_dout_carry_mux[15:0];
+ dsp_x_b <= rd_narrow_xy_dout_carry_mux_or_unity;
+ dsp_y_b <= rd_narrow_xy_dout_carry_mux_or_unity;
dsp_xy_b_carry <= rd_narrow_xy_dout_carry_mux[17:16];
end
//
end else begin
//
- dsp_x_b <= {16{1'bX}};
- dsp_y_b <= {16{1'bX}};
+ dsp_x_b <= WORD_DNC;
+ dsp_y_b <= WORD_DNC;
//
dsp_xy_b_carry <= 2'b00;
//