diff options
| -rw-r--r-- | src/stm32/modexpa7_driver_sample.c | 306 | ||||
| -rw-r--r-- | src/stm32/test/modexp_fpga_model_vectors.h | 94 |
2 files changed, 400 insertions, 0 deletions
diff --git a/src/stm32/modexpa7_driver_sample.c b/src/stm32/modexpa7_driver_sample.c new file mode 100644 index 0000000..4738026 --- /dev/null +++ b/src/stm32/modexpa7_driver_sample.c @@ -0,0 +1,306 @@ +/*
+ * modexpa7_driver_sample.c
+ * ----------------------------------------------
+ * Demo program to test ModExpA7 core in hardware
+ *
+ * Authors: Pavel Shatov
+ * Copyright (c) 2017, NORDUnet A/S
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * - Neither the name of the NORDUnet nor the names of its contributors may
+ * be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /*
+ * Note, that the test program needs a custom bitstream without
+ * the core selector, where the DUT is at offset 0.
+ */
+
+ // stm32 headers
+#include "stm-init.h"
+#include "stm-led.h"
+#include "stm-fmc.h"
+
+ // test vectors
+#include "test/modexp_fpga_model_vectors.h"
+
+ // locations of core registers
+#define CORE_ADDR_NAME0 (0x00 << 2)
+#define CORE_ADDR_NAME1 (0x01 << 2)
+#define CORE_ADDR_VERSION (0x02 << 2)
+#define CORE_ADDR_CONTROL (0x08 << 2)
+#define CORE_ADDR_STATUS (0x09 << 2)
+#define CORE_ADDR_MODE (0x10 << 2)
+#define CORE_ADDR_MODULUS_BITS (0x11 << 2)
+#define CORE_ADDR_EXPONENT_BITS (0x12 << 2)
+#define CORE_ADDR_BUFFER_BITS (0x13 << 2)
+#define CORE_ADDR_ARRAY_BITS (0x14 << 2)
+
+
+ // locations of operand buffers
+#define CORE_ADDR_BANK_MODULUS (0x800 + 0 * 0x200)
+#define CORE_ADDR_BANK_MESSAGE (0x800 + 1 * 0x200)
+#define CORE_ADDR_BANK_EXPONENT (0x800 + 2 * 0x200)
+#define CORE_ADDR_BANK_RESULT (0x800 + 3 * 0x200)
+
+ // bit maps
+#define CORE_CONTROL_BIT_INIT 0x00000001
+#define CORE_CONTROL_BIT_NEXT 0x00000002
+
+#define CORE_STATUS_BIT_READY 0x00000001
+#define CORE_STATUS_BIT_VALID 0x00000002
+
+#define CORE_MODE_BIT_CRT 0x00000002
+
+
+ /*
+ * test vectors
+ */
+static const uint32_t m_384[] = M_384;
+static const uint32_t n_384[] = N_384;
+static const uint32_t d_384[] = D_384;
+static const uint32_t s_384[] = S_384;
+
+static const uint32_t m_512[] = M_512;
+static const uint32_t n_512[] = N_512;
+static const uint32_t d_512[] = D_512;
+static const uint32_t s_512[] = S_512;
+
+
+ /*
+ * prototypes
+ */
+void toggle_yellow_led(void);
+
+void setup_modexpa7( const uint32_t *n, size_t l);
+
+int test_modexpa7( const uint32_t *m,
+ const uint32_t *d,
+ const uint32_t *s,
+ size_t l);
+
+
+ /*
+ * test routine
+ */
+int main()
+{
+ int ok;
+
+ stm_init();
+ fmc_init();
+
+ // turn on the green led
+ led_on(LED_GREEN);
+ led_off(LED_RED);
+ led_off(LED_YELLOW);
+ led_off(LED_BLUE);
+
+ // check, that core is present
+ uint32_t core_name0;
+ uint32_t core_name1;
+ uint32_t core_version;
+
+ fmc_read_32(CORE_ADDR_NAME0, &core_name0);
+ fmc_read_32(CORE_ADDR_NAME1, &core_name1);
+ fmc_read_32(CORE_ADDR_VERSION, &core_version);
+
+ // must be "mode", "xpa7", "0.20"
+ if ( (core_name0 != 0x6D6F6465) ||
+ (core_name1 != 0x78706137) ||
+ (core_version != 0x302E3230))
+ {
+ led_off(LED_GREEN);
+ led_on(LED_RED);
+ while (1);
+ }
+
+ // read compile-time settings
+ uint32_t core_buffer_bits;
+ uint32_t core_array_bits;
+
+ // largest supported operand width, systolic array "power"
+ fmc_read_32(CORE_ADDR_BUFFER_BITS, &core_buffer_bits);
+ fmc_read_32(CORE_ADDR_ARRAY_BITS, &core_array_bits);
+
+ // repeat forever
+ while (1)
+ {
+ // New modulus requires precomputation of modulus-dependent
+ // speed-up coefficient, this must be done once per new
+ // modulus, i.e. when we're repeatedly signing with the
+ // same key, we only need to do precomputation once before
+ // starting the very first signing operation.
+
+ // fresh start
+ ok = 1;
+
+ {
+ // run precomputation of modulus-dependent factor for the 384-bit modulus
+ setup_modexpa7(n_384, 384);
+
+ // try signing the message from the 384-bit test vector
+ ok = ok && test_modexpa7(m_384, d_384, s_384, 384);
+ }
+ {
+ // run precomputation of modulus-dependent factor for the 512-bit modulus
+ setup_modexpa7(n_512, 512);
+
+ // try signing the message from the 512-bit test vector
+ ok = ok && test_modexpa7(m_512, d_512, s_512, 512);
+ }
+
+ // turn on the red led to indicate something went wrong
+ if (!ok)
+ { led_off(LED_GREEN);
+ led_on(LED_RED);
+ }
+
+ // indicate, that we're alive doing something...
+ toggle_yellow_led();
+ }
+}
+
+
+ /*
+ * Load new modulus and do the necessary precomputations.
+ */
+void setup_modexpa7( const uint32_t *n,
+ size_t l)
+{
+ size_t i, num_words;
+ uint32_t num_bits;
+ uint32_t reg_control, reg_status;
+ uint32_t n_word;
+ uint32_t dummy_num_cyc;
+
+ // determine numbers of 32-bit words
+ num_words = l >> 5;
+
+ // set modulus width
+ num_bits = l;
+ fmc_write_32(CORE_ADDR_MODULUS_BITS, &num_bits);
+
+ // fill modulus bank (the least significant word
+ // is at the lowest offset)
+ for (i=0; i<num_words; i++)
+ { n_word = n[i];
+ fmc_write_32(CORE_ADDR_BANK_MODULUS + ((num_words - (i + 1)) * sizeof(uint32_t)), &n_word);
+ }
+
+ // clear 'init' control bit, then set 'init' control bit again
+ // to trigger precomputation (core is edge-triggered)
+ reg_control = 0;
+ fmc_write_32(CORE_ADDR_CONTROL, ®_control);
+ reg_control = CORE_CONTROL_BIT_INIT;
+ fmc_write_32(CORE_ADDR_CONTROL, ®_control);
+
+ // wait for 'ready' status bit to be set
+ dummy_num_cyc = 0;
+ do
+ { dummy_num_cyc++;
+ fmc_read_32(CORE_ADDR_STATUS, ®_status);
+ }
+ while (!(reg_status & CORE_STATUS_BIT_READY));
+}
+
+
+ //
+ // Sign the message and compare it against the correct reference value.
+ //
+int test_modexpa7( const uint32_t *m,
+ const uint32_t *d,
+ const uint32_t *s,
+ size_t l)
+{
+ size_t i, num_words;
+ uint32_t num_bits;
+ uint32_t reg_control, reg_status;
+ uint32_t m_word, d_word, s_word;
+ uint32_t dummy_num_cyc;
+
+ // determine numbers of 32-bit words
+ num_words = l >> 5;
+
+ // set exponent width
+ num_bits = l;
+ fmc_write_32(CORE_ADDR_EXPONENT_BITS, &num_bits);
+
+ // fill modulus bank (the least significant word
+ // is at the lowest offset)
+ for (i=0; i<num_words; i++)
+ { m_word = m[i];
+ d_word = d[i];
+ fmc_write_32(CORE_ADDR_BANK_MESSAGE + ((num_words - (i + 1)) * sizeof(uint32_t)), &m_word);
+ fmc_write_32(CORE_ADDR_BANK_EXPONENT + ((num_words - (i + 1)) * sizeof(uint32_t)), &d_word);
+ }
+
+ // clear 'next' control bit, then set 'next' control bit again
+ // to trigger exponentiation (core is edge-triggered)
+ reg_control = 0;
+ fmc_write_32(CORE_ADDR_CONTROL, ®_control);
+ reg_control = CORE_CONTROL_BIT_NEXT;
+ fmc_write_32(CORE_ADDR_CONTROL, ®_control);
+
+ // wait for 'valid' status bit to be set
+ dummy_num_cyc = 0;
+ do
+ { dummy_num_cyc++;
+ fmc_read_32(CORE_ADDR_STATUS, ®_status);
+ }
+ while (!(reg_status & CORE_STATUS_BIT_VALID));
+
+ // read back the result word-by-word, then compare to the reference values
+ for (i=0; i<num_words; i++)
+ {
+ fmc_read_32(CORE_ADDR_BANK_RESULT + (i * sizeof(uint32_t)), &s_word);
+
+ if (s_word != s[num_words - (i + 1)])
+ return 0;
+ }
+
+ // everything went just fine
+ return 1;
+}
+
+
+ //
+ // toggle the yellow led to indicate that we're not stuck somewhere
+ //
+void toggle_yellow_led(void)
+{
+ static int led_state = 0;
+
+ led_state = !led_state;
+
+ if (led_state) led_on(LED_YELLOW);
+ else led_off(LED_YELLOW);
+}
+
+
+ //
+ // end of file
+ //
diff --git a/src/stm32/test/modexp_fpga_model_vectors.h b/src/stm32/test/modexp_fpga_model_vectors.h new file mode 100644 index 0000000..622b16c --- /dev/null +++ b/src/stm32/test/modexp_fpga_model_vectors.h @@ -0,0 +1,94 @@ +/* Generated automatically, do not edit. */ + +#define N_384 \ + {0xb06b4de3, 0x1006214f, 0xaa3c8cae, 0x6c568477, \ + 0xb8c8d8b2, 0x08684070, 0x3b9ba674, 0x739e0eec, \ + 0x950a0d8a, 0xb6b7443d, 0xfebe690c, 0xe2810099} + +#define M_384 \ + {0x00d1bda6, 0x6c3babf4, 0xe418ec5b, 0x18435414, \ + 0x5ed5b8aa, 0x0b62f138, 0x84551519, 0x1e94e625, \ + 0x0901814a, 0x138eda05, 0x56b54f83, 0x1cd7605d} + +#define D_384 \ + {0xad24a30c, 0x766d8dc3, 0xe2100b02, 0x24d1c4b0, \ + 0xbb6a6342, 0x577df9be, 0x89bb1ec3, 0xdc3259f0, \ + 0x1a343f93, 0x57a12599, 0xa328ae2f, 0xf85ef401} + +#define S_384 \ + {0x65752d0f, 0x9a017293, 0x36bfa115, 0x4a7a81fc, \ + 0xa76b945b, 0x49a3f645, 0x76801499, 0xb98e6a16, \ + 0xd2467b6a, 0x75b7d614, 0x0fff0fde, 0xb31d1819} + +#define P_384 \ + {0xe9ac4cf6, 0x03b2d80a, 0x7f1d091e, 0x49d5f1a0, \ + 0xac2ae4ff, 0xbf9bf375} + +#define Q_384 \ + {0xc1468f3e, 0xc6909231, 0x5a4d74ba, 0x477b303f, \ + 0x4b2e10d1, 0x1f44e815} + +#define DP_384 \ + {0x69b6c286, 0x95fbc613, 0x51988034, 0x8cb0d684, \ + 0x9aff38e4, 0x9ef9ddb5} + +#define DQ_384 \ + {0x1eda82b7, 0x84bf4377, 0x39712ff7, 0x24be179f, \ + 0xa302c190, 0x80ab6159} + +#define MP_384 \ + {0x9e163bb5, 0x35e718cb, 0xcde52b7b, 0x5db8552b, \ + 0x46a300e0, 0x34f91e6b} + +#define MQ_384 \ + {0x7b01a724, 0x90f0d5f9, 0x9e237ce5, 0x6d31fd28, \ + 0x4ecb9dad, 0x58bf366a} + +#define N_512 \ + {0xef78b4ed, 0xaee1cc78, 0x659b9935, 0x39d5f5e1, \ + 0xa47c2b29, 0x5a38e8c4, 0x85e2b846, 0xa354614f, \ + 0xde1f94ee, 0x7462ba8f, 0x991ffec3, 0x6172bc7a, \ + 0x11784156, 0x572b6e41, 0xa23fa8d0, 0x257ae8f7} + +#define M_512 \ + {0x005536b6, 0x43ea651f, 0x2fd3c70a, 0xa83659cb, \ + 0xd0c1f47b, 0xa8033730, 0x29c6b082, 0x6db48613, \ + 0x6b4f769c, 0x6bf531ff, 0x247d6d76, 0xea4ad050, \ + 0xdc0e82cc, 0xedf5fd1c, 0xe07abb51, 0x92204551} + +#define D_512 \ + {0xc9686c43, 0xbbe28d66, 0x758ef8bc, 0x9b7828e5, \ + 0x2ec2804a, 0xb76745de, 0x83fcbba0, 0x2d9eba78, \ + 0x215f4cc2, 0xf49387b3, 0x8ed0b9dc, 0x6c129231, \ + 0x944368be, 0xdbf2db79, 0x16323c49, 0x34cdf801} + +#define S_512 \ + {0xcc2fc6b6, 0xe4849987, 0x75773499, 0xcb0792b0, \ + 0xe79f4600, 0xb2d739c5, 0x1a661ac6, 0xd3bf2db5, \ + 0xfd1e029d, 0xfe887387, 0x4312635f, 0xb2b54b8d, \ + 0x5d3b379e, 0x161eaa4f, 0xedfd932b, 0x780f0203} + +#define P_512 \ + {0xfedea889, 0x97cfdb79, 0xcca87074, 0xe5abcda1, \ + 0x3be201c4, 0xc416fd15, 0xf2130931, 0x61ff5937} + +#define Q_512 \ + {0xf0889147, 0x5aa60f93, 0xb9927d86, 0x8f795c5c, \ + 0x8e98dcf2, 0xad3aad74, 0x9441583a, 0x967dce41} + +#define DP_512 \ + {0x2504d437, 0xfffbe9e5, 0xfc0aef22, 0x9b8563bd, \ + 0xaa83fe3b, 0xc53b8d91, 0x15731c5f, 0xb6db2eeb} + +#define DQ_512 \ + {0xd3265fba, 0x2eb65638, 0x4d106ec7, 0x000dfe69, \ + 0x75f87505, 0x47d299d0, 0x1c115cdd, 0x599ca8c1} + +#define MP_512 \ + {0x23359955, 0xcad299b6, 0x049bb248, 0x3828b6a5, \ + 0x74c85825, 0x7dd8e109, 0x07edbda9, 0x4980c2c9} + +#define MQ_512 \ + {0x8578120b, 0x91f4ca9e, 0x371d3e70, 0x0005bb89, \ + 0xd31ed864, 0x477bd9cf, 0x65a1f03b, 0x606d3bc8} + |