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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
-include ../makefile.init
RM := rm -rf
CC = clang
# All of the sources participating in the build are defined here
-include sources.mk
-include src/subdir.mk
-include subdir.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
endif
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
# All Target
all: modexp
# Tool invocations
modexp: $(OBJS) $(USER_OBJS)
@echo 'Building target: $@'
@echo 'Invoking: MacOS X C Linker'
$(CC) -o "modexp" $(OBJS) $(USER_OBJS) $(LIBS)
@echo 'Finished building target: $@'
@echo ' '
# Other Targets
clean:
-$(RM) $(EXECUTABLES)$(OBJS)$(C_DEPS) modexp
-@echo ' '
.PHONY: all clean dependents
.SECONDARY:
-include ../makefile.targets
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