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AgeCommit message (Expand)Author
2015-06-30Fixed missing parenthesis in block memories that reduced mem sizes. Added tes...Joachim Strömbergson
2015-06-29Added testcases with 1024 bit and 2048 bit modulus, mem and short exponents.Joachim Strömbergson
2015-06-27Fixed the license in the header.Joachim Strömbergson
2015-06-26Added test case with small exponent and modulus, message that requires paddin...Joachim Strömbergson
2015-06-26Changed modexp core to use explicit exponent length to allow removal of paddi...Joachim Strömbergson
2015-06-26Removed extra digit in test case KAT that had creeped in.Joachim Strömbergson
2015-06-24Fused the s_mem init loop into the adder loop.Joachim Strömbergson
2015-06-24Small improvement in report of test result.Joachim Strömbergson
2015-06-24(1) Untangled the word index address generator from the product logic. (2) Up...Joachim Strömbergson
2015-06-22Removing stale states in FSM.Joachim Strömbergson
2015-06-17(1) Collapsed the sm and sa adder states. Thisimoproves performance for modex...Joachim Strömbergson
2015-06-16Fixed final big testcase to match python model.Joachim Strömbergson
2015-06-16Collapsing cycles for loop counter. Updating testbench to match removed cycles.Joachim Strömbergson
2015-06-16Fixed non trivial yet fairly short testcases.Joachim Strömbergson
2015-06-15Fixed baseline.Joachim Strömbergson
2015-06-10More cleanup. Adding a lot of compile flags to be able to silence the testbench.Joachim Strömbergson
2015-06-10Added cycle counter to the montprod testbench to measure the execution time.Joachim Strömbergson
2015-06-03Adding the encipher/verify test case with 1024 bit RSA key by Rob.Joachim Strömbergson
2015-06-02Adding sign testcase with 1024 bit operands from real RSA key.Joachim Strömbergson
2015-06-02Refactored into core and top.Joachim Strömbergson
2015-05-24Fixed names.Joachim Strömbergson
2015-05-24Adding two more signing test cases with e=65537 and explicit lengths for expo...Joachim Strömbergson
2015-05-21Added internal cycle counter. Added API addresses to extract cycle counter va...Joachim Strömbergson
2015-05-20(1) Removed unneeded default state. (2) Cleanup of testbench and added a bigg...Joachim Strömbergson
2015-05-20Changed to using modexp length register and removed the common length register.Joachim Strömbergson
2015-05-19Updated TB to use access ports. Added missing invalidate of residue when modu...Joachim Strömbergson
2015-04-27Updating modexp core to v 0.50. This version contains a working core that can...Joachim Strömbergson
2015-04-24(1) Adding auto generated testbench for verilog. (2) Update of the test gener...Joachim Strömbergson
2015-04-20Adding testbench for the residue calculator.Joachim Strömbergson
2015-04-13Adding testbenches for montprod and modexp. The montprod tb has testcases for...Joachim Strömbergson
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