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path: root/src/rtl/montprod.v
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2015-06-15Fixed prev reg:Joachim Strömbergson
2015-06-15(1) Fixing up write address register fo s mem. (2) Cleanup of loop counter.Joachim Strömbergson
2015-06-15Cleanup and fixing name in preparation for cycle crunch.Joachim Strömbergson
2015-05-08Fixed RH operand size.Joachim Strömbergson
2015-04-27Adding localparam for debugging that had gone missing.Joachim Strömbergson
2015-04-27Updating modexp core to v 0.50. This version contains a working core that ↵Joachim Strömbergson
can perform sign and verify with big keys/values. The core builds ok in Altera and Xilinx FPGA tools. This commit also includes a new testgenerator capable of generating testbench for modexp with autgenerated test data of different lengths. The README has been updated with status and implementation results in for different FPGA devices.
2015-04-13Adding initial versions of rtl for modexp. Montgomery multiplication works ↵Joachim Strömbergson
for 8192 bit operands. Modexp can build, but lacks proper control and residue generator. Memories has been tested to match block memories in Xilinx and Altera FPGAs.