core/math/modexp - Modular exponentiation core

Age	Commit message (Collapse)	Author
2015-06-18	Update after linting after cycle collapsing.	Joachim Strömbergson

2015-06-17	(1) Collapsed the sm and sa adder states. Thisimoproves performance for ↵	Joachim Strömbergson
	modexp with 3%. (2) Updated montprod testbench to not use the now removed states. (3) Minor code cleanup to make it easier to work with for further improvements.
2015-06-17	(1) Cleaned up bit select for operand b and a. (2) Fixed name of loop ↵	Joachim Strömbergson
	counter. (3) Reordered processes to main datapath first.
2015-06-17	Fixed order of states.	Joachim Strömbergson

2015-06-16	Merge of s_mux and s_write to allow cycle collapsing.	Joachim Strömbergson

2015-06-16	Collapsing cycles for loop counter. Updating testbench to match removed cycles.	Joachim Strömbergson

2015-06-16	Collapsed done. Removes one cycle from each montprod.	Joachim Strömbergson

2015-06-15	cleanup of s mem write control.	Joachim Strömbergson

2015-06-15	Fixed the carry registers.	Joachim Strömbergson

2015-06-15	Fixed prev reg:	Joachim Strömbergson

2015-06-15	(1) Fixing up write address register fo s mem. (2) Cleanup of loop counter.	Joachim Strömbergson

2015-06-15	Cleanup and fixing name in preparation for cycle crunch.	Joachim Strömbergson

2015-05-08	Fixed RH operand size.	Joachim Strömbergson

2015-04-27	Adding localparam for debugging that had gone missing.	Joachim Strömbergson

2015-04-27	Updating modexp core to v 0.50. This version contains a working core that ↵	Joachim Strömbergson
	can perform sign and verify with big keys/values. The core builds ok in Altera and Xilinx FPGA tools. This commit also includes a new testgenerator capable of generating testbench for modexp with autgenerated test data of different lengths. The README has been updated with status and implementation results in for different FPGA devices.
2015-04-13	Adding initial versions of rtl for modexp. Montgomery multiplication works ↵	Joachim Strömbergson
	for 8192 bit operands. Modexp can build, but lacks proper control and residue generator. Memories has been tested to match block memories in Xilinx and Altera FPGAs.