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authorJoachim StroĢˆmbergson <joachim@secworks.se>2015-06-18 11:00:31 +0200
committerJoachim StroĢˆmbergson <joachim@secworks.se>2015-06-18 11:00:31 +0200
commitc0448c8663a0513d2060d974e153a6b93e4bfa4e (patch)
treedee61a3afeb95df919fb0c2a7c3d6642179f3e80 /src
parent35c08fcc620a0b6118dc7ee2811475454cf5050b (diff)
Restored version of montprod to a version that actually works.
Diffstat (limited to 'src')
-rw-r--r--src/rtl/montprod.v53
1 files changed, 35 insertions, 18 deletions
diff --git a/src/rtl/montprod.v b/src/rtl/montprod.v
index f505d0c..9748b09 100644
--- a/src/rtl/montprod.v
+++ b/src/rtl/montprod.v
@@ -127,7 +127,7 @@ module montprod(
reg [04 : 0] b_bit_index_reg;
reg [04 : 0] b_bit_index_new;
- reg b_bit_index_we;
+ reg [04 : 0] b_bit_index_we;
reg [07 : 0] word_index_reg; //register of what word is being read
reg [07 : 0] word_index_new; //calculation of what word to be read
@@ -157,7 +157,7 @@ module montprod(
wire [31 : 0] add_result_sm;
wire add_carry_out_sm;
- reg [31 : 0] shr_data_in;
+ reg shr_data_in;
wire shr_carry_out;
wire [31 : 0] shr_data_out;
@@ -331,19 +331,44 @@ module montprod(
//----------------------------------------------------------------
always @*
begin : s_select_write
- sa_adder_data_in = 32'h0;
- shr_carry_in_new = 1'b0;
+ shr_carry_in_new = 1'b0;
+ s_mux_new = SMUX_0;
+ s_mem_we_new = 1'b0;
+ sa_adder_data_in = 32'h0;
+
+ case (montprod_ctrl_reg)
+ CTRL_INIT_S:
+ begin
+ s_mux_new = SMUX_0; // write 0
+ s_mem_we_new = 1'b1;
+ end
+
+ CTRL_L_CALC_SA:
+ begin
+ //s = (s + q*M + b*A) >>> 1;, if(b==1) S+= A. Takes (1..length) cycles.
+ s_mux_new = SMUX_ADD_SA;
+ s_mem_we_new = b_reg | q_reg;
+ end
+
+ CTRL_L_CALC_SDIV2:
+ begin
+ //s = (s + q*M + b*A) >>> 1; s>>=1. Takes (1..length) cycles.
+ s_mux_new = SMUX_SHR;
+ s_mem_we_new = 1'b1;
+ end
+
+ default:
+ begin
+ end
+ endcase
+
+ s_mem_new = 32'h0;
add_carry_in_sa_new = 1'b0;
add_carry_in_sm_new = 1'b0;
- s_mem_new = 32'h0;
- s_mem_we_new = 1'b0;
case (s_mux_reg)
SMUX_0:
- begin
- s_mem_new = 32'h0;
- s_mem_we_new = 1'b1;
- end
+ s_mem_new = 32'h0;
SMUX_ADD_SA:
begin
@@ -359,7 +384,6 @@ module montprod(
add_carry_in_sa_new = add_carry_out_sa;
add_carry_in_sm_new = add_carry_out_sm;
- s_mem_we_new = b_reg | q_reg;
end
SMUX_SHR:
@@ -367,7 +391,6 @@ module montprod(
shr_data_in = s_mem_read_data;
s_mem_new = shr_data_out;
shr_carry_in_new = shr_carry_out;
- s_mem_we_new = 1'b1;
end
default:
@@ -460,8 +483,6 @@ module montprod(
CTRL_INIT_S:
begin
- s_mux_new = SMUX_0;
-
if (word_index_reg == 8'h0)
begin
loop_ctr_set = 1'b1;
@@ -496,8 +517,6 @@ module montprod(
CTRL_L_CALC_SA:
begin
- s_mux_new = SMUX_ADD_SA;
-
if (word_index_reg == 8'h0)
begin
reset_word_index_lsw = 1'b1;
@@ -515,8 +534,6 @@ module montprod(
CTRL_L_CALC_SDIV2:
begin
- s_mux_new = SMUX_SHR;
-
if (word_index_reg == length_m1)
begin
montprod_ctrl_new = CTRL_L_STALLPIPE_D2;