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-rw-r--r--src/tb/tb_sha512.v19
-rw-r--r--src/tb/tb_sha512_core.v21
2 files changed, 15 insertions, 25 deletions
diff --git a/src/tb/tb_sha512.v b/src/tb/tb_sha512.v
index a0dcb4c..8bc0068 100644
--- a/src/tb/tb_sha512.v
+++ b/src/tb/tb_sha512.v
@@ -37,11 +37,6 @@
//
//======================================================================
-//------------------------------------------------------------------
-// Simulator directives.
-//------------------------------------------------------------------
-`timescale 1ns/10ps
-
//------------------------------------------------------------------
// Test module.
@@ -202,7 +197,7 @@ module tb_sha512();
//
// Dump the state of the dump when needed.
//----------------------------------------------------------------
- task dump_dut_state();
+ task dump_dut_state;
begin
$display("State of DUT");
$display("------------");
@@ -257,7 +252,7 @@ module tb_sha512();
//
// Toggles reset to force the DUT into a well defined state.
//----------------------------------------------------------------
- task reset_dut();
+ task reset_dut;
begin
$display("*** Toggle reset.");
tb_reset_n = 0;
@@ -275,7 +270,7 @@ module tb_sha512();
// Initialize all counters and testbed functionality as well
// as setting the DUT inputs to defined values.
//----------------------------------------------------------------
- task init_sim();
+ task init_sim;
begin
cycle_ctr = 32'h00000000;
error_ctr = 32'h00000000;
@@ -296,7 +291,7 @@ module tb_sha512();
//
// Display the accumulated test results.
//----------------------------------------------------------------
- task display_test_result();
+ task display_test_result;
begin
if (error_ctr == 0)
begin
@@ -321,7 +316,7 @@ module tb_sha512();
// when the dut is actively processing and will in fact at some
// point set the flag.
//----------------------------------------------------------------
- task wait_ready();
+ task wait_ready;
begin
read_data = 0;
@@ -431,7 +426,7 @@ module tb_sha512();
//
// Read the name and version from the DUT.
//----------------------------------------------------------------
- task check_name_version();
+ task check_name_version;
reg [31 : 0] name0;
reg [31 : 0] name1;
reg [31 : 0] version;
@@ -459,7 +454,7 @@ module tb_sha512();
// Read the digest in the dut. The resulting digest will be
// available in the global variable digest_data.
//----------------------------------------------------------------
- task read_digest();
+ task read_digest;
begin
read_word(ADDR_DIGEST0);
digest_data[511 : 480] = read_data;
diff --git a/src/tb/tb_sha512_core.v b/src/tb/tb_sha512_core.v
index b8523a0..8aeaa33 100644
--- a/src/tb/tb_sha512_core.v
+++ b/src/tb/tb_sha512_core.v
@@ -37,11 +37,6 @@
//
//======================================================================
-//------------------------------------------------------------------
-// Simulator directives.
-//------------------------------------------------------------------
-`timescale 1ns/10ps
-
//------------------------------------------------------------------
// Test module.
@@ -134,7 +129,7 @@ module tb_sha512_core();
//
// Dump the state of the dut.
//----------------------------------------------------------------
- task dump_dut_state();
+ task dump_dut_state;
begin
$display("State of DUT");
$display("------------");
@@ -160,8 +155,8 @@ module tb_sha512_core();
dut.state_init, dut.state_update);
$display("first_block = 0x%01x, ready_flag = 0x%01x, w_init = 0x%01x",
dut.first_block, dut.ready_flag, dut.w_init);
- $display("t_ctr_inc = 0x%01x, t_ctr_rst = 0x%01x, t_ctr_reg = 0x%02x",
- dut.t_ctr_inc, dut.t_ctr_rst, dut.t_ctr_reg);
+ $display("round_ctr_inc = 0x%01x, round_ctr_rst = 0x%01x, round_ctr_reg = 0x%02x",
+ dut.round_ctr_inc, dut.round_ctr_rst, dut.round_ctr_reg);
$display("");
$display("State registers:");
@@ -189,7 +184,7 @@ module tb_sha512_core();
//
// Dump the state of the dut wmem.
//----------------------------------------------------------------
- task dump_dut_wmem();
+ task dump_dut_wmem;
begin
$display("State of DUT WMEM");
$display("-----------------");
@@ -215,7 +210,7 @@ module tb_sha512_core();
//
// Toggle reset to put the DUT into a well known state.
//----------------------------------------------------------------
- task reset_dut();
+ task reset_dut;
begin
$display("*** Toggle reset.");
tb_reset_n = 0;
@@ -231,7 +226,7 @@ module tb_sha512_core();
// Initialize all counters and testbed functionality as well
// as setting the DUT inputs to defined values.
//----------------------------------------------------------------
- task init_sim();
+ task init_sim;
begin
cycle_ctr = 0;
error_ctr = 0;
@@ -254,7 +249,7 @@ module tb_sha512_core();
//
// Display the accumulated test results.
//----------------------------------------------------------------
- task display_test_result();
+ task display_test_result;
begin
if (error_ctr == 0)
begin
@@ -277,7 +272,7 @@ module tb_sha512_core();
// when the dut is actively processing and will in fact at some
// point set the flag.
//----------------------------------------------------------------
- task wait_ready();
+ task wait_ready;
begin
while (!tb_ready)
begin