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-rw-r--r--src/rtl/sha256.v32
1 files changed, 9 insertions, 23 deletions
diff --git a/src/rtl/sha256.v b/src/rtl/sha256.v
index 7f1dc94..5e733bd 100644
--- a/src/rtl/sha256.v
+++ b/src/rtl/sha256.v
@@ -213,29 +213,15 @@ module sha256(
.block(core_block),
// State access ports
- .H0_wr_data(write_data),
- .H0_we(state0_we),
-
- .H1_wr_data(write_data),
- .H1_we(state1_we),
-
- .H2_wr_data(write_data),
- .H2_we(state2_we),
-
- .H3_wr_data(write_data),
- .H3_we(state3_we),
-
- .H4_wr_data(write_data),
- .H4_we(state4_we),
-
- .H5_wr_data(write_data),
- .H5_we(state5_we),
-
- .H6_wr_data(write_data),
- .H6_we(state6_we),
-
- .H7_wr_data(write_data),
- .H7_we(state7_we),
+ .state_wr_data(write_data),
+ .state0_we(state0_we),
+ .state1_we(state1_we),
+ .state2_we(state2_we),
+ .state3_we(state3_we),
+ .state4_we(state4_we),
+ .state5_we(state5_we),
+ .state6_we(state6_we),
+ .state7_we(state7_we),
.ready(core_ready),