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### Cyclone IV E ###
Implementation results using the Altera Quartus-II v13.1 design tool.
-Device: Cyclone IV E - EP4CE6F17C6
-- 3765 LEs
+***Cyclone IV E***
+- EP4CE6F17C6
+- 3882 LEs
- 1813 registers
-- 76 MHz
+- 74 MHz
- 66 cycles latency
-
-### Cyclone IV GX ###
-Implementation results using the Altera Quartus-II v13.1 design tool.
-
-Device: Cyclone IV GX - EP4CGX22CF19C6
-- 3765 LEs
+***Cyclone IV GX***
+- EP4CGX22CF19C6
+- 3773 LEs
- 1813 registers
- 76 MHz
- 66 cycles latency
-
-### Cyclone V GX ###
-Implementation results using the Altera Quartus-II v13.1 design tool.
-
-Device: Cyclone V GX - 5CGXFC7C7F23C8
-- 1456 ALMs
+***Cyclone V***
+- 5CGXFC7C7F23C8
+- 1469 ALMs
- 1813 registers
-- 78 MHz
+- 79 MHz
- 66 cycles latency
-
-
-## Todo ##
+## TODO ##
- Extensive verification in physical device.
- Complete documentation.
## Status ##
+***(2013-02-23)***
+
+Cleanup, more results etc. Move all wmem update logic to a separate
+process for a cleaner code.
+
+
**(2014-02-22)**
Redesigned the W-memory into a sliding window solution. This not only