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authorJoachim StroĢˆmbergson <joachim@secworks.se>2014-03-16 21:34:52 +0100
committerJoachim StroĢˆmbergson <joachim@secworks.se>2014-03-16 21:34:52 +0100
commitaf4e88047d524f2d0b43402e51476fa1932efe95 (patch)
tree09d4fd3d77d0432b311e77395c00e12f82652d60 /src/tb/tb_sha1.v
parent6131547a064b1c83d7fadf6edbc57144bd404f0e (diff)
Added wait to allow the ready flag to be dropped with resettable flags. Fixed name of clock delay parameter.
Diffstat (limited to 'src/tb/tb_sha1.v')
-rw-r--r--src/tb/tb_sha1.v16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/tb/tb_sha1.v b/src/tb/tb_sha1.v
index 6e39075..abf25d2 100644
--- a/src/tb/tb_sha1.v
+++ b/src/tb/tb_sha1.v
@@ -5,6 +5,7 @@
// Testbench for the SHA-1 top level wrapper.
//
//
+// Author: Joachim Strombergson
// Copyright (c) 2014, SUNET
// All rights reserved.
//
@@ -48,7 +49,8 @@ module tb_sha1();
parameter DEBUG_CORE = 0;
parameter DEBUG_TOP = 0;
- parameter CLK_HALF_PERIOD = 2;
+ parameter CLK_HALF_PERIOD = 1;
+ parameter CLK_PERIOD = CLK_HALF_PERIOD * 2;
parameter ADDR_NAME0 = 8'h00;
parameter ADDR_NAME1 = 8'h01;
@@ -150,7 +152,7 @@ module tb_sha1();
dump_top_state();
end
- #(2 * CLK_HALF_PERIOD);
+ #(CLK_PERIOD);
cycle_ctr = cycle_ctr + 1;
end
@@ -333,7 +335,7 @@ module tb_sha1();
tb_address = address;
tb_cs = 1;
tb_write_read = 0;
- #(2 * CLK_HALF_PERIOD);
+ #(CLK_PERIOD);
read_data = tb_data_out;
tb_cs = 0;
@@ -364,7 +366,7 @@ module tb_sha1();
tb_data_in = word;
tb_cs = 1;
tb_write_read = 1;
- #(2 * CLK_HALF_PERIOD);
+ #(CLK_PERIOD);
tb_cs = 0;
tb_write_read = 0;
end
@@ -461,7 +463,7 @@ module tb_sha1();
write_block(block);
write_word(ADDR_CTRL, CTRL_INIT_VALUE);
- write_word(ADDR_CTRL, 8'h00);
+ #(CLK_PERIOD);
wait_ready();
read_digest();
@@ -500,7 +502,7 @@ module tb_sha1();
// First block
write_block(block0);
write_word(ADDR_CTRL, CTRL_INIT_VALUE);
- write_word(ADDR_CTRL, 8'h00);
+ #(CLK_PERIOD);
wait_ready();
read_digest();
@@ -519,7 +521,7 @@ module tb_sha1();
// Final block
write_block(block1);
write_word(ADDR_CTRL, CTRL_NEXT_VALUE);
- write_word(ADDR_CTRL, 8'h00);
+ #(CLK_PERIOD);
wait_ready();
read_digest();