BranchCommit messageAuthorAge
masterFixed copyright notices.Pavel V. Shatov (Meister)4 months
AgeCommit messageAuthor
2021-07-19Fixed copyright notices.HEADmasterPavel V. Shatov (Meister)
2021-04-12Updated testbench to match how things work in hardware.Pavel V. Shatov (Meister)
2020-01-21Another testbench to make sure, that the new pipelined core selector canPavel V. Shatov (Meister)
2020-01-21New testbench with two clocks.Pavel V. Shatov (Meister)
2020-01-21Bumped version number.Pavel V. Shatov (Meister)
2020-01-21New FMC arbiter. FMC bus now runs at 45 MHz, while the system clock is 90 MHz,Pavel V. Shatov (Meister)
2018-07-06Forgot to bump version number.Pavel V. Shatov (Meister)
2018-07-05Added testbench to mimic STM32's FMC side.Pavel V. Shatov (Meister)
2018-07-05FMC arbiter overhaul.Pavel V. Shatov (Meister)
2018-07-05Removed now unnecessary CDC modules.Pavel V. Shatov (Meister)