| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-12-13 | whack copyrightsHEADmaster | Paul Selkirk |
| 2015-11-12 | Change reset to active-low. | Paul Selkirk |
| 2015-04-29 | Cleanup: add error port, remove dummy register. | Paul Selkirk |
| 2015-03-31 | Don't delay register reads in eim_regs. | Paul Selkirk |
| 2015-03-17 | Rearrange cores. | Paul Selkirk |
 |
index : core/comm/eim | |
| Verilog implementation of EIM interface used to connect FPGA cores to Freescale i | git repositories |
| aboutsummaryrefslogtreecommitdiff |