| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-09-27 | Added missing reset of registers. This fixes CT-01-001 FPGA. | Joachim Strömbergson |
| 2018-05-21 | Moved the Sbox used for key expansion into the key_mem. | Joachim Strömbergson |
| 2018-05-21 | Adding inital version of AES core optimized for performance. | Joachim Strömbergson |
 |
index : core/cipher/aes_speed | |
| (Old) Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) | git repositories |
| aboutsummaryrefslogtreecommitdiff |