| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-05-21 | Updated core status and implementation details. | Joachim Strömbergson |
| 2018-05-21 | Increased number of inverse S-boxes to 16 and removed S-box scheduling. | Joachim Strömbergson |
| 2018-05-21 | Cleaned up redundant wires. | Joachim Strömbergson |
| 2018-05-21 | Moved the Sbox used for key expansion into the key_mem. | Joachim Strömbergson |
| 2018-05-21 | Removed the sbox word mux. Removed ports for sbox access in the encipher data... | Joachim Strömbergson |
| 2018-05-21 | Removed the sword counter since it is not needed. | Joachim Strömbergson |
| 2018-05-21 | Connected the new S-boxes and collapsed the SubBytes operation into one cycle... | Joachim Strömbergson |
| 2018-05-21 | Adding 16 S-boxes to the encipher datapath. | Joachim Strömbergson |
| 2018-05-21 | Adding task to wait for ready to be set. This allows us to measure the number... | Joachim Strömbergson |
| 2018-05-21 | Adding inital version of AES core optimized for performance. | Joachim Strömbergson |
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index : core/cipher/aes_speed | |
| (Old) Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) | git repositories |
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