| Mode | Name | Size | |
|---|---|---|---|
| d--------- | model / python | 33 | logplain |
| d--------- | rtl | 288 | logplain |
| d--------- | tb | 223 | logplain |
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index : core/cipher/aes | |
| Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) | git repositories |
| aboutsummaryrefslogtreecommitdiff |