| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-11-27 | Adding testbenchs. | Joachim StroĢmbergson |
| 2014-11-27 | Adding RTL source files for the AES core. | Joachim StroĢmbergson |
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index : core/cipher/aes | |
| Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) | git repositories |
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