| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-05-21 | Cleaned up redundant wires. | Joachim Strömbergson |
| 2018-05-21 | Removed the sbox word mux. Removed ports for sbox access in the encipher data... | Joachim Strömbergson |
| 2018-05-21 | Removed the sword counter since it is not needed. | Joachim Strömbergson |
| 2018-05-21 | Connected the new S-boxes and collapsed the SubBytes operation into one cycle... | Joachim Strömbergson |
| 2018-05-21 | Adding 16 S-boxes to the encipher datapath. | Joachim Strömbergson |
| 2017-12-14 | Synced the AES core rtl and testbench to github. The updates does not add or ... | Joachim Strömbergson |
| 2015-12-13 | whack copyrights | Paul Selkirk |
| 2014-11-27 | Adding RTL source files for the AES core. | Joachim Strömbergson |
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index : core/cipher/aes | |
| Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) | git repositories |
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