| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-05-04 | (1) Changed ordet of status and config addresses to conform to what we have i... | Joachim Strömbergson |
| 2014-11-28 | Reworked the sbox and inverse sbox. Slighly smaller design and much shorter s... | Joachim Strömbergson |
| 2014-11-28 | Removed obsolete target. | Joachim Strömbergson |
| 2014-11-27 | Adding Makefile for building simulation targets. | Joachim Strömbergson |
| 2014-11-27 | Adding Python models for AES as well as key expansion and rcon. | Joachim Strömbergson |
| 2014-11-27 | Adding testbenchs. | Joachim Strömbergson |
| 2014-11-27 | Adding RTL source files for the AES core. | Joachim Strömbergson |
| 2014-11-27 | Adding license file too. | Joachim Strömbergson |
| 2014-11-27 | Adding readme for the aes core. | Joachim Strömbergson |
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index : core/cipher/aes | |
| Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) | git repositories |
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