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{{{
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{{{
#!html
<h1>fmc-test</h1>
<p>Demo program for stm32-dev-bridge board to test FMC arbiter in Novena's
on-board FPGA.</p>
<p>Current issues:
* SystemClock_Config() currently uses 16 MHz HSI oscillator as PLL input,
this should be changed to 25 MHz crystal later.</p>
}}}
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