From b092ffbcbe2c9398494f7dc9db6f0796971633e0 Mon Sep 17 00:00:00 2001
From: Rob Austein <sra@hactrn.net>
Date: Sun, 13 Sep 2020 23:04:30 +0000
Subject: Import Cryptech wiki dump

---
 .../GitRepositories%2Ftest%2Fcoretest_bp_entropy   | 37 ++++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 raw-wiki-dump/GitRepositories%2Ftest%2Fcoretest_bp_entropy

(limited to 'raw-wiki-dump/GitRepositories%2Ftest%2Fcoretest_bp_entropy')

diff --git a/raw-wiki-dump/GitRepositories%2Ftest%2Fcoretest_bp_entropy b/raw-wiki-dump/GitRepositories%2Ftest%2Fcoretest_bp_entropy
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+{{{
+#!htmlcomment
+
+This page is maintained automatically by a script.  Don't modify this page by hand,
+your changes will just be overwritten the next time the script runs.  Talk to your
+Friendly Neighborhood Repository Maintainer if you need to change something here.
+
+}}}
+
+{{{
+#!html
+<h1>coretest_bpaysan_entropy</h1>
+
+<p>Coretest system for testing the FPGA based entropy source developed by Bernd Paysan.</p>
+
+<h2>Introduction</h2>
+
+<p>This project is a coretest system dedicated to test entropy sources
+within a FPGA device. The specific entropy source has ben designed by
+Bernd Paysan.</p>
+
+<p>The entropy source used two sets of 16 free running digital oscillators
+that are interconnected.</p>
+
+<p>The system uses the coretest module to read and write 32-bit data to
+core, In this case it allows a caller to read generated random 16-bit
+values from the entropy source. The 16 bit data is in the LSB of the
+word.</p>
+
+<p>The completc system contains a UART core for external access. The
+project contains pin assignments etc to implement the system on a
+TerasIC C5G board.</p>
+}}}
+
+[[RepositoryIndex(format=table,glob=test/coretest_bp_entropy)]]
+
+|| Clone `https://git.cryptech.is/test/coretest_bp_entropy.git` ||
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