From 13d0f55865f8b1b851ce1e84597b144c5fd41662 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Sun, 13 Sep 2020 23:15:43 +0000 Subject: GC --- ...tRepositories%2Ftest%2Fcoretest_bp_entropy.trac | 37 ---------------------- 1 file changed, 37 deletions(-) delete mode 100644 raw-wiki-dump/GitRepositories%2Ftest%2Fcoretest_bp_entropy.trac (limited to 'raw-wiki-dump/GitRepositories%2Ftest%2Fcoretest_bp_entropy.trac') diff --git a/raw-wiki-dump/GitRepositories%2Ftest%2Fcoretest_bp_entropy.trac b/raw-wiki-dump/GitRepositories%2Ftest%2Fcoretest_bp_entropy.trac deleted file mode 100644 index 4fbe988..0000000 --- a/raw-wiki-dump/GitRepositories%2Ftest%2Fcoretest_bp_entropy.trac +++ /dev/null @@ -1,37 +0,0 @@ -{{{ -#!htmlcomment - -This page is maintained automatically by a script. Don't modify this page by hand, -your changes will just be overwritten the next time the script runs. Talk to your -Friendly Neighborhood Repository Maintainer if you need to change something here. - -}}} - -{{{ -#!html -

coretest_bpaysan_entropy

- -

Coretest system for testing the FPGA based entropy source developed by Bernd Paysan.

- -

Introduction

- -

This project is a coretest system dedicated to test entropy sources -within a FPGA device. The specific entropy source has ben designed by -Bernd Paysan.

- -

The entropy source used two sets of 16 free running digital oscillators -that are interconnected.

- -

The system uses the coretest module to read and write 32-bit data to -core, In this case it allows a caller to read generated random 16-bit -values from the entropy source. The 16 bit data is in the LSB of the -word.

- -

The completc system contains a UART core for external access. The -project contains pin assignments etc to implement the system on a -TerasIC C5G board.

-}}} - -[[RepositoryIndex(format=table,glob=test/coretest_bp_entropy)]] - -|| Clone `https://git.cryptech.is/test/coretest_bp_entropy.git` || -- cgit v1.2.3