From 891730d13b324fad916572a82f0bd610c5de9aad Mon Sep 17 00:00:00 2001
From: Rob Austein <sra@hactrn.net>
Date: Sun, 13 Sep 2020 23:06:24 +0000
Subject: Rename for conversion

---
 ...itRepositories%2Fcore%2Frng%2Favalanche_entropy | 54 ----------------------
 1 file changed, 54 deletions(-)
 delete mode 100644 raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy

(limited to 'raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy')

diff --git a/raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy b/raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy
deleted file mode 100644
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-{{{
-#!htmlcomment
-
-This page is maintained automatically by a script.  Don't modify this page by hand,
-your changes will just be overwritten the next time the script runs.  Talk to your
-Friendly Neighborhood Repository Maintainer if you need to change something here.
-
-}}}
-
-{{{
-#!html
-<h1>avalanche_entropy</h1>
-
-<p>Entropy provider core for an external avalanche noise based entropy source.</p>
-
-<h2>Functional Description</h2>
-
-<p>This core samples noise provided on an input pin. The noise is expected
-to be 'digital' that is fairly rapidly move from voltage levels
-matching ones and zeros as handled by the digital process used to
-implement the core.</p>
-
-<p>The noise is sampled with double registers. Then phase detection is
-applied to find positive flanks. The core contains a free running clock
-(clocked at the provided core clock frequency). When a positive flank in
-the noise is detected, the LSB of the clock is sampled and added to a
-shift registers. When at least 32 bits has been collected, the result is
-presented as entropy available to any entropy consumer connected to the
-core.</p>
-
-<p>The core also includes a delta time counter. This counter is used for
-testing of the core and is available via the API.</p>
-
-<p>The fact that the core uses the flank of the to drive the entropy bit
-generation, but that the timing between the flanks means that if
-the noise source have a bias for zero or one state does not affect which
-entropy bits are generated.</p>
-
-<h2>Implementation Status</h2>
-
-<p>The core has been tested with several revisions of the Cryptech
-avalanche noise board. The core has been implemented in Altera
-Cyclone-IV and Cyclone-V devices as well as in Xilinx Spartan-6
-devices. The core clock frequency used has been 25 MHz, 33 MHz and 50
-MHz.</p>
-
-<p>The generated entropy has been extensively tested (using the ent tool as
-well as other custom tools) and found to be generating entropy with good
-quality.</p>
-}}}
-
-[[RepositoryIndex(format=table,glob=core/rng/avalanche_entropy)]]
-
-|| Clone `https://git.cryptech.is/core/rng/avalanche_entropy.git` ||
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