From 18fb1695b84248fc75ceb3569ff03cbeca51a620 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Mon, 15 Feb 2021 22:29:56 +0000 Subject: Seriously rework link processing --- pelican/content/OpenCryptoChip.md | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'pelican/content/OpenCryptoChip.md') diff --git a/pelican/content/OpenCryptoChip.md b/pelican/content/OpenCryptoChip.md index f7e8f6c..6f1fa97 100644 --- a/pelican/content/OpenCryptoChip.md +++ b/pelican/content/OpenCryptoChip.md @@ -69,7 +69,7 @@ We need to support key wrapping. Some pointers: # Rough Cut at v0.01 Proof of Concept Feature Set -As a proof of concept, to validate as much as possible the assurance of the tools and methods, and as a demonstration of the project tools, team, and architecture, we have a [proposed version 0.01 product](RoughV1) as a proof of concept and a demonstration of the project tools, team, and architecture +As a proof of concept, to validate as much as possible the assurance of the tools and methods, and as a demonstration of the project tools, team, and architecture, we have a [proposed version 0.01 product](RoughV1.md) as a proof of concept and a demonstration of the project tools, team, and architecture @@ -92,10 +92,10 @@ As a proof of concept, to validate as much as possible the assurance of the tool # Ongoing Development -* [SUNET is sponsoring the first two development steps](SunetInitialDevelopment) currently being done. -* [ Investigation and planning of a TRNG with entropy sources](TRNGDevelopment) -* [Investigation of possible EDA tools and ways to do open and assured HW development"](EDAToolchainSurvey") -* [Collection about side-channel attacks and detection, mitigation methods"](SideChannel") +* [SUNET is sponsoring the first two development steps](SunetInitialDevelopment.md) currently being done. +* [ Investigation and planning of a TRNG with entropy sources](TRNGDevelopment.md) +* [Investigation of possible EDA tools and ways to do open and assured HW development"](EDAToolchainSurvey".md) +* [Collection about side-channel attacks and detection, mitigation methods"](SideChannel".md) # v0.1 Major Sub-Projects @@ -115,7 +115,7 @@ As a proof of concept, to validate as much as possible the assurance of the tool * TerasIC C5G Cyclone 5 GX Starter Kit. Includes an Altera C5GX FPGA. This board is used for core, subsystem development and verification. Info, documentation and ordering of the TerasIC board can be found here: http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=830 -Here is a writeup on how to [setup and run coretest_hashes on the C5G board](CoretestHashesC5G). +Here is a writeup on how to [setup and run coretest_hashes on the C5G board](CoretestHashesC5G.md). * TerasIC DE0-Nano board. This tiny, USB powered board is used for core development and verification. Info, documentation, resources, ordering of the TerasIC board can be found here: http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=593 @@ -129,7 +129,7 @@ Here is a writeup on how to [setup and run coretest_hashes on the C5G board](Cor * Research * Select -* [On-chip Interconnect Standards](InterconnectStandards) to use. +* [On-chip Interconnect Standards](InterconnectStandards.md) to use. ## Methods and Validation @@ -191,4 +191,4 @@ Here is a writeup on how to [setup and run coretest_hashes on the C5G board](Cor # Future Development -The v0.1 version of CrypTech is not the last version nor the only possible version. The project for example consider possible [ASIC Implementations](ASICImplementations). +The v0.1 version of [CrypTech](CrypTech.md) is not the last version nor the only possible version. The project for example consider possible [ASIC Implementations](ASICImplementations.md). -- cgit v1.2.3