From 8e59cfff8f67a0c22d11f988afb3d95fa8530174 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Sun, 14 Feb 2021 02:19:20 +0000 Subject: linebreaks --- markdown/AlphaBoardStrategy.md | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'markdown/AlphaBoardStrategy.md') diff --git a/markdown/AlphaBoardStrategy.md b/markdown/AlphaBoardStrategy.md index e7f36a2..23c0b31 100644 --- a/markdown/AlphaBoardStrategy.md +++ b/markdown/AlphaBoardStrategy.md @@ -25,11 +25,13 @@ Develop a first, custom HSM board that can be used to support a first set of app ## Way forward -We currently use the Novena as a dev-board. It has a ["Freescale i.MX6 CPU (ARM Cortex A9)"], and a Xilinx Spartan-6 LX45 CSG324-packaged FPGA.[[BR]](http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&tab=Documentation_Tab&pspll=1&SelectedAsset=Documentation&ProdMetaId=PID/DC/i.MX6Q&fromPSP=true&assetLockedForNavigation=true&componentId=2&leftNavCode=1&pageSize=25&Documentation=Documentation/00610Ksd1nd%60%60Data%20Sheets&fpsp=1&linkline=Data%20Sheets) +We currently use the Novena as a dev-board. It has a ["Freescale i.MX6 CPU (ARM Cortex A9)"](http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&tab=Documentation_Tab&pspll=1&SelectedAsset=Documentation&ProdMetaId=PID/DC/i.MX6Q&fromPSP=true&assetLockedForNavigation=true&componentId=2&leftNavCode=1&pageSize=25&Documentation=Documentation/00610Ksd1nd%60%60Data%20Sheets&fpsp=1&linkline=Data%20Sheets), and a Xilinx Spartan-6 LX45 CSG324-packaged FPGA. + We want to over-size rather than under-size the FPGA on the Alpha board. The biggest FPGA from Xilinx/Altera that does not require tools with a commercial license that we've found is the ​Xilinx Artix-7 XC7A200T FBG484. -We've only considered ARM CPUs. Either about the size of Cortex M3 / M4 (or future M7) or Cortex A8 / A9.[[BR]] +We've only considered ARM CPUs. Either about the size of Cortex M3 / M4 (or future M7) or Cortex A8 / A9. + A design with an A8/A9 turned out to be unattractive from a complexity and price point of view, so we're going to use one of the biggest M4 we could find. STM32F429. @@ -46,12 +48,15 @@ We are currently using a Freescale proprietary interface called EIM between the ## Conclusion -Use a high-end Cortex-M4 ARM.[[BR]] +Use a high-end Cortex-M4 ARM. + There is a huge difference in complexity between M4 and A9, mainly because of the DDR3 memory used with A9. An M4 design will both be easier to design, cheaper to both design and build and will be fast enough for all our early use cases anyways. -Do not use the exact same FPGA, as it is too small to fit everything we need.[[BR]] +Do not use the exact same FPGA, as it is too small to fit everything we need. + + +Develop full schematics in-house. -Develop full schematics in-house.[[BR]] It turned out to be hard, costly or both, to outsource this part. We will probably spend less time developing the schematics ourselves than we would spend explaining what to develop to a third party. -- cgit v1.2.3