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authorRob Austein <sra@hactrn.net>2020-09-13 23:04:30 +0000
committerRob Austein <sra@hactrn.net>2020-09-13 23:04:30 +0000
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+{{{
+#!htmlcomment
+
+This page is maintained automatically by a script. Don't modify this page by hand,
+your changes will just be overwritten the next time the script runs. Talk to your
+Friendly Neighborhood Repository Maintainer if you need to change something here.
+
+}}}
+
+{{{
+#!html
+<h1>vndecorrelator</h1>
+
+<h1>Introduction</h1>
+
+<p>A Verilog implementation of a von Neumann decorrelator, generally called
+a conditioner or whitening function. This tiny module consumes entropy
+bits and outputs decorrelated bits.</p>
+
+<p>The <a href="http://www1.spms.ntu.edu.sg/~kkhoongm/Entropy.pdf">Von Neumann decorrelator</a>
+consumes pairs of bits and outputs bits based on the pattern in th bit pairs:</p>
+
+<ul>
+<li>00 and 11: No output of a bit.</li>
+<li>10 and 01: Output the first bit in the pair</li>
+</ul>
+
+<p>In the best case with random bits, the output bitrate will be 1/4. For
+heavily biased input bits, the rate will be much slower. When used with
+a broken entropy source that is stuck at zero or one, no bits will be
+emitted.</p>
+
+<p>This implementation operates on streams of single bits and creates pairs
+internally.</p>
+
+<h1>Status</h1>
+
+<p>Implementation done. Tested in FPGA designs and works.</p>
+}}}
+
+[[RepositoryIndex(format=table,glob=user/js/vndecorrelator)]]
+
+|| Clone `https://git.cryptech.is/user/js/vndecorrelator.git` ||