From 13d0f55865f8b1b851ce1e84597b144c5fd41662 Mon Sep 17 00:00:00 2001
From: Rob Austein <sra@hactrn.net>
Date: Sun, 13 Sep 2020 23:15:43 +0000
Subject: GC

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 ...tories%2Fuser%2Fshatov%2Fmodexpng_fpga_model.md | 22 ----------------------
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diff --git a/raw-wiki-dump/GitRepositories%2Fuser%2Fshatov%2Fmodexpng_fpga_model.md b/raw-wiki-dump/GitRepositories%2Fuser%2Fshatov%2Fmodexpng_fpga_model.md
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-```
-#!htmlcomment
-
-This page is maintained automatically by a script.  Don't modify this page by hand,
-your changes will just be overwritten the next time the script runs.  Talk to your
-Friendly Neighborhood Repository Maintainer if you need to change something here.
-
-```
-
-```
-#!html
-<h1>modexpng_fpga_model</h1>
-
-<p>Math model of ModExpNG IP core. The model mimics how an FPGA does modular exponentiation.</p>
-
-<p>First use the scripts from the <code>vector/</code> folder to generate and format a keypair vector, then edit the <i>DUMP_*</i> switches in <code>modexpng_fpga_model.py</code> to dump the desired internal values. The <i>FORCE_OVERFLOW</i> setting artificially forces the virtually neven seen internal interim overflow situation and allows its handler to be tested. You can also un-comment the _#c.dump_banks()_ line and move it anywhere within _sign_using_crt()_ and/or _sign_without_crt()_ to dump the contents of entire core's memory.</p>
-```
-
-[[RepositoryIndex(format=table,glob=user/shatov/modexpng_fpga_model)]]
-
-| Clone `https://git.cryptech.is/user/shatov/modexpng_fpga_model.git` |
-|---|
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