From 891730d13b324fad916572a82f0bd610c5de9aad Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Sun, 13 Sep 2020 23:06:24 +0000 Subject: Rename for conversion --- ...itories%2Fuser%2Fshatov%2Fecdsa_fpga_model.trac | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 raw-wiki-dump/GitRepositories%2Fuser%2Fshatov%2Fecdsa_fpga_model.trac (limited to 'raw-wiki-dump/GitRepositories%2Fuser%2Fshatov%2Fecdsa_fpga_model.trac') diff --git a/raw-wiki-dump/GitRepositories%2Fuser%2Fshatov%2Fecdsa_fpga_model.trac b/raw-wiki-dump/GitRepositories%2Fuser%2Fshatov%2Fecdsa_fpga_model.trac new file mode 100644 index 0000000..cc3cf9c --- /dev/null +++ b/raw-wiki-dump/GitRepositories%2Fuser%2Fshatov%2Fecdsa_fpga_model.trac @@ -0,0 +1,39 @@ +{{{ +#!htmlcomment + +This page is maintained automatically by a script. Don't modify this page by hand, +your changes will just be overwritten the next time the script runs. Talk to your +Friendly Neighborhood Repository Maintainer if you need to change something here. + +}}} + +{{{ +#!html +

ecdsa_model_fpga

+ +

This reference model was written to help debug Verilog code, it mimics how an FPGA would do elliptic curve base point scalar multiplication for ECDSA curves P-256 and P-384. Note, that the model may do weird (from CPU point of view, of course) things at times. Another important thing is that while FPGA modules are actually written to operate in constant-time manner, this model itself doesn't take any active measures to keep run-time constant. Do NOT use it in production as-is!

+ +

The model is split into 4 layers:

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Modular multiplier and invertor use complex algorithms and are thus further split into "helper" sub-routines.

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This model uses tips and tricks from the following sources:

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    +
  1. Guide to Elliptic Curve Cryptography
  2. +
  3. Ultra High Performance ECC over NIST Primes +on Commercial FPGAs
  4. +
  5. Constant Time Modular Inversion
  6. +
+}}} + +[[RepositoryIndex(format=table,glob=user/shatov/ecdsa_fpga_model)]] + +|| Clone `https://git.cryptech.is/user/shatov/ecdsa_fpga_model.git` || -- cgit v1.2.3