From 13d0f55865f8b1b851ce1e84597b144c5fd41662 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Sun, 13 Sep 2020 23:15:43 +0000 Subject: GC --- .../GitRepositories%2Fuser%2Fjs%2Ftoggle.trac | 30 ---------------------- 1 file changed, 30 deletions(-) delete mode 100644 raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle.trac (limited to 'raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle.trac') diff --git a/raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle.trac b/raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle.trac deleted file mode 100644 index 5c7d4d2..0000000 --- a/raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle.trac +++ /dev/null @@ -1,30 +0,0 @@ -{{{ -#!htmlcomment - -This page is maintained automatically by a script. Don't modify this page by hand, -your changes will just be overwritten the next time the script runs. Talk to your -Friendly Neighborhood Repository Maintainer if you need to change something here. - -}}} - -{{{ -#!html -

toggle

- -

Introduction

- -

This repo contains a simple deign that toggles an ouput pin. The toggle -is in sync with the given sys_clk, but the toggle circuit divides down -the clock. The divisor is build time defined.

- -

The design is used in the Cryptech FPGA design to observe internal -clock frequencies.

- -

Status

- -

Has been simulated with Icarus Verilog.

-}}} - -[[RepositoryIndex(format=table,glob=user/js/toggle)]] - -|| Clone `https://git.cryptech.is/user/js/toggle.git` || -- cgit v1.2.3