From 3aa8b1dd6e0f504ef83da99f8c9cdb2532f948f5 Mon Sep 17 00:00:00 2001
From: Rob Austein <sra@hactrn.net>
Date: Sun, 13 Sep 2020 23:10:21 +0000
Subject: Initial conversion pass

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 .../GitRepositories%2Fuser%2Fjs%2Ftoggle.md        | 31 ++++++++++++++++++++++
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 create mode 100644 raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle.md

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+```
+#!htmlcomment
+
+This page is maintained automatically by a script.  Don't modify this page by hand,
+your changes will just be overwritten the next time the script runs.  Talk to your
+Friendly Neighborhood Repository Maintainer if you need to change something here.
+
+```
+
+```
+#!html
+<h1>toggle</h1>
+
+<h2>Introduction</h2>
+
+<p>This repo contains a simple deign that toggles an ouput pin. The toggle
+is in sync with the given sys_clk, but the toggle circuit divides down
+the clock. The divisor is build time defined.</p>
+
+<p>The design is used in the Cryptech FPGA design to observe internal
+clock frequencies.</p>
+
+<h2>Status</h2>
+
+<p>Has been simulated with Icarus Verilog.</p>
+```
+
+[[RepositoryIndex(format=table,glob=user/js/toggle)]]
+
+| Clone `https://git.cryptech.is/user/js/toggle.git` |
+|---|
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