From 3aa8b1dd6e0f504ef83da99f8c9cdb2532f948f5 Mon Sep 17 00:00:00 2001
From: Rob Austein <sra@hactrn.net>
Date: Sun, 13 Sep 2020 23:10:21 +0000
Subject: Initial conversion pass

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 ...sitories%2Ftest%2Fexternal_avalanche_entropy.md | 36 ++++++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 raw-wiki-dump/GitRepositories%2Ftest%2Fexternal_avalanche_entropy.md

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diff --git a/raw-wiki-dump/GitRepositories%2Ftest%2Fexternal_avalanche_entropy.md b/raw-wiki-dump/GitRepositories%2Ftest%2Fexternal_avalanche_entropy.md
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+```
+#!htmlcomment
+
+This page is maintained automatically by a script.  Don't modify this page by hand,
+your changes will just be overwritten the next time the script runs.  Talk to your
+Friendly Neighborhood Repository Maintainer if you need to change something here.
+
+```
+
+```
+#!html
+<h2>External Avalanche Entropy</h2>
+
+<p>This is a test project of an entropy provider that collects entropy from
+an avalanche noise based source.</p>
+
+<p>The design expects a one bit digital input noise signal. The collector
+observes positive flank events in the input noise signal and measures the
+time between these events using a counter. The counter is free running
+and increases once for each clock cycle (currently running av 50 MHz).</p>
+
+<p>The LSB of the counter is added to a 32-bit entropy register at each
+event.</p>
+
+<p>As debug output the entropy register is sampled at a given rate
+(currently a few times per second). The debug output is connected to LED
+on the FPGA development board.</p>
+
+<p>The project also contains project files, pin assignments and clock
+definition neded to implement the design on a TerasIC DE0-Nano board.</p>
+```
+
+[[RepositoryIndex(format=table,glob=test/external_avalanche_entropy)]]
+
+| Clone `https://git.cryptech.is/test/external_avalanche_entropy.git` |
+|---|
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