From 13d0f55865f8b1b851ce1e84597b144c5fd41662 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Sun, 13 Sep 2020 23:15:43 +0000 Subject: GC --- ...sitories%2Ftest%2Fexternal_avalanche_entropy.md | 36 ---------------------- 1 file changed, 36 deletions(-) delete mode 100644 raw-wiki-dump/GitRepositories%2Ftest%2Fexternal_avalanche_entropy.md (limited to 'raw-wiki-dump/GitRepositories%2Ftest%2Fexternal_avalanche_entropy.md') diff --git a/raw-wiki-dump/GitRepositories%2Ftest%2Fexternal_avalanche_entropy.md b/raw-wiki-dump/GitRepositories%2Ftest%2Fexternal_avalanche_entropy.md deleted file mode 100644 index 05cb516..0000000 --- a/raw-wiki-dump/GitRepositories%2Ftest%2Fexternal_avalanche_entropy.md +++ /dev/null @@ -1,36 +0,0 @@ -``` -#!htmlcomment - -This page is maintained automatically by a script. Don't modify this page by hand, -your changes will just be overwritten the next time the script runs. Talk to your -Friendly Neighborhood Repository Maintainer if you need to change something here. - -``` - -``` -#!html -

External Avalanche Entropy

- -

This is a test project of an entropy provider that collects entropy from -an avalanche noise based source.

- -

The design expects a one bit digital input noise signal. The collector -observes positive flank events in the input noise signal and measures the -time between these events using a counter. The counter is free running -and increases once for each clock cycle (currently running av 50 MHz).

- -

The LSB of the counter is added to a 32-bit entropy register at each -event.

- -

As debug output the entropy register is sampled at a given rate -(currently a few times per second). The debug output is connected to LED -on the FPGA development board.

- -

The project also contains project files, pin assignments and clock -definition neded to implement the design on a TerasIC DE0-Nano board.

-``` - -[[RepositoryIndex(format=table,glob=test/external_avalanche_entropy)]] - -| Clone `https://git.cryptech.is/test/external_avalanche_entropy.git` | -|---| -- cgit v1.2.3