From 21ea76204ce3cc1869257fc8f1585c78d5c4d088 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Sat, 24 Jul 2021 00:23:18 -0400 Subject: Whack with club until all links pass linkchecker Most of these weren't really links at all, just unquoted CamelCase. --- pelican/content/InterconnectStandards.md | 38 ++++++++++++++++---------------- 1 file changed, 19 insertions(+), 19 deletions(-) (limited to 'pelican/content/InterconnectStandards.md') diff --git a/pelican/content/InterconnectStandards.md b/pelican/content/InterconnectStandards.md index 3896a83..a31da2c 100644 --- a/pelican/content/InterconnectStandards.md +++ b/pelican/content/InterconnectStandards.md @@ -133,7 +133,7 @@ sell products that use, or are based on Avalon interfaces." As far as we can discern, Avalon is not generally used outside of Altera based designs and not supported by a large group of third party -vendors. The [OpenCores]({filename}OpenCores.md) project lists only a few cores that uses Avalon +vendors. The OpenCores project lists only a few cores that uses Avalon as interface standard. = @@ -274,41 +274,41 @@ and thus reduce the interest Cryptech as a HSM solution. ## References -[(1)](=#fn1) https://en.wikipedia.org/wiki/Advanced_Microcontroller_Bus_Architecture +1. https://en.wikipedia.org/wiki/Advanced_Microcontroller_Bus_Architecture -[(2)](=#fn2) http://www.arm.com/products/system-ip/amba/amba-open-specifications.php +2. http://www.arm.com/products/system-ip/amba/amba-open-specifications.php -[(3)](=#fn3) https://en.wikipedia.org/wiki/LEON +3. https://en.wikipedia.org/wiki/LEON -[(4)](=#fn4) http://www.arm.com/products/system-ip/amba/index.php?tab=AMBA+Trademark+Guidelines +4. http://www.arm.com/products/system-ip/amba/index.php?tab=AMBA+Trademark+Guidelines -[(5)](=#fn5) http://www.altera.com/literature/manual/mnl_avalon_spec.pdf +5. http://www.altera.com/literature/manual/mnl_avalon_spec.pdf -[(6)](=#fn6) http://www.altera.com/devices/processor/nios2/ni2-index.html +6. http://www.altera.com/devices/processor/nios2/ni2-index.html -[(7)](=#fn7) http://opencores.org/ +7. http://opencores.org/ -[(8)](=#fn8) https://en.wikipedia.org/wiki/CoreConnect +8. https://en.wikipedia.org/wiki/CoreConnect -[(9)](=#fn9) http://www.xilinx.com/products/intellectual-property/dr_pcentral_coreconnect.htm +9. http://www.xilinx.com/products/intellectual-property/dr_pcentral_coreconnect.htm -[(10)](=#fn10) http://www.xilinx.com/ipcenter/doc/ibm_click_core_connect_license.pdf +10. http://www.xilinx.com/ipcenter/doc/ibm_click_core_connect_license.pdf -[(11)](=#fn11) https://en.wikipedia.org/wiki/Open_Core_Protocol +11. https://en.wikipedia.org/wiki/Open_Core_Protocol -[(12)](=#fn12) https://en.wikipedia.org/wiki/Accellera +12. https://en.wikipedia.org/wiki/Accellera -[(13)](=#fn13) http://www.ocpip.org/ +13. http://www.ocpip.org/ -[(14)](=#fn14) http://www.ocpip.org/license_signup.php +14. http://www.ocpip.org/license_signup.php -[(15)](=#fn15) http://opencores.org/opencores,wishbone +15. http://opencores.org/opencores,wishbone -[(16)](=#fn16) https://en.wikipedia.org/wiki/Wishbone_(computer_bus) +16. https://en.wikipedia.org/wiki/Wishbone_(computer_bus) -[(17)](=#fn17) http://openrisc.net/ +17. http://openrisc.net/ -[(18)](=#fn18) http://opencores.org/or1k/Main_Page +18. http://opencores.org/or1k/Main_Page ## Copyright and License -- cgit v1.2.3