From 6fddcde0083d383de06ff9b04c5aed88347ffe31 Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Thu, 17 Oct 2019 21:15:51 +0300 Subject: Added readme file --- README.md | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 README.md diff --git a/README.md b/README.md new file mode 100644 index 0000000..ddef800 --- /dev/null +++ b/README.md @@ -0,0 +1,6 @@ +modexpng_fpga_model +=================== + +Math model of ModExpNG IP core. The model mimics how an FPGA does modular exponentiation. + +First use the scripts from the `vector/` folder to generate and format a keypair vector, then edit the DUMP_* switches in `modexpng_fpga_model.py` to dump the desired internal values. The FORCE_OVERFLOW setting artificially forces the virtually neven seen internal interim overflow situation and allows its handler to be tested. You can also un-comment the _#c.dump_banks()_ line and move it anywhere within _sign_using_crt()_ and/or _sign_without_crt()_ to dump the contents of entire core's memory. -- cgit v1.2.3