From 0b4b42da734c1164b65a334351274f946b2d4dcb Mon Sep 17 00:00:00 2001
From: "Pavel V. Shatov (Meister)" <meisterpaul1@yandex.ru>
Date: Thu, 3 Oct 2019 16:38:18 +0300
Subject: Redesigned storage modules, added top-level module, added I/O storage
 space.

---
 rtl/modexpng_sdp_36k_x16_x32_wrapper.v | 75 ++++++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 rtl/modexpng_sdp_36k_x16_x32_wrapper.v

(limited to 'rtl/modexpng_sdp_36k_x16_x32_wrapper.v')

diff --git a/rtl/modexpng_sdp_36k_x16_x32_wrapper.v b/rtl/modexpng_sdp_36k_x16_x32_wrapper.v
new file mode 100644
index 0000000..69c5383
--- /dev/null
+++ b/rtl/modexpng_sdp_36k_x16_x32_wrapper.v
@@ -0,0 +1,75 @@
+module modexpng_sdp_36k_x16_x32_wrapper
+(
+    clk, clk_bus,
+    
+    ena, wea,
+    addra, dina,
+    
+    enb, regceb,
+    addrb, doutb
+);
+
+
+    //
+    // Headers
+    //
+    `include "modexpng_parameters.vh"
+
+
+    //
+    // Ports
+    //
+    input                                     clk;
+    input                                     clk_bus;
+    
+    input                                     ena;
+    input                                     wea;
+    input  [BANK_ADDR_W + BUS_OP_ADDR_W -1:0] addra;
+    input  [              BUD_DATA_W    -1:0] dina;
+    
+    input                                     enb;
+    input                                     regceb;
+    input  [BANK_ADDR_W + OP_ADDR_W     -1:0] addrb;
+    output [              WORD_W        -1:0] doutb;
+
+    
+    //
+    // BRAM_SDP_MACRO
+    //
+    BRAM_SDP_MACRO #
+    (
+        .DEVICE                 ("7SERIES"),
+        
+        .BRAM_SIZE              ("36Kb"),
+        
+        .WRITE_WIDTH            (BUD_DATA_W),
+        .READ_WIDTH             (WORD_W),
+        
+        .DO_REG                 (0),
+        .WRITE_MODE             ("READ_FIRST"),
+        
+        .SRVAL                  (72'h000000000000000000),
+        .INIT                   (72'h000000000000000000),
+
+        .INIT_FILE              ("NONE"),
+        .SIM_COLLISION_CHECK    ("NONE")
+    )
+    BRAM_SDP_MACRO_inst
+    (
+        .RST        (1'b0),
+    
+        .WRCLK      (clk_bus),
+        .WREN       (ena),
+        .WE         ({4{wea}}),
+        .WRADDR     (addra),
+        .DI         (dina),
+        
+        .RDCLK      (clk),
+        .RDEN       (enb),
+        .REGCE      (regceb),
+        .RDADDR     (addrb),
+        .DO         (doutb)
+    );
+    
+    
+endmodule
-- 
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