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-rw-r--r--rtl/modexpng_mmm_fsm.vh11
-rw-r--r--rtl/modexpng_parameters.vh26
-rw-r--r--rtl/modexpng_part_recombinator.v425
3 files changed, 378 insertions, 84 deletions
diff --git a/rtl/modexpng_mmm_fsm.vh b/rtl/modexpng_mmm_fsm.vh
index 2700a42..3bdae66 100644
--- a/rtl/modexpng_mmm_fsm.vh
+++ b/rtl/modexpng_mmm_fsm.vh
@@ -30,5 +30,14 @@ localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_MULT_TRIANGLE_COL_N_BUSY = 26;
localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_MULT_TRIANGLE_HOLDOFF = 27;
+localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_MULT_RECTANGLE_COL_0_INIT = 31;
+localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_MULT_RECTANGLE_COL_0_TRIG = 32;
+localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_MULT_RECTANGLE_COL_0_BUSY = 33;
+
+localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_MULT_RECTANGLE_COL_N_INIT = 34;
+localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_MULT_RECTANGLE_COL_N_TRIG = 35;
+localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_MULT_RECTANGLE_COL_N_BUSY = 36;
+
+localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_MULT_RECTANGLE_HOLDOFF = 37;
+
localparam [FSM_STATE_WIDTH-1:0] FSM_STATE_STOP = 999;
- \ No newline at end of file
diff --git a/rtl/modexpng_parameters.vh b/rtl/modexpng_parameters.vh
index f846119..57eef35 100644
--- a/rtl/modexpng_parameters.vh
+++ b/rtl/modexpng_parameters.vh
@@ -3,19 +3,19 @@
//localparam BANK_ADDR_WIDTH = 3; // TODO: Replace everywhere!
-localparam [2:0] BANK_FAT_T1T2 = 3'd0;
-localparam [2:0] BANK_FAT_ABL = 3'd1;
-localparam [2:0] BANK_FAT_ABH = 3'd2;
-localparam [2:0] BANK_FAT_Q = 3'd3;
-localparam [2:0] BANK_FAT_Q_EXT = 3'd4;
-localparam [2:0] BANK_FAT_ML = 3'd5;
-localparam [2:0] BANK_FAT_MH = 3'd6;
-localparam [2:0] BANK_FAT_MH_EXT = 3'd7;
-
-localparam [1:0] BANK_SLIM_T1T2 = 2'd0;
-localparam [1:0] BANK_SLIM_N = 2'd1;
-localparam [1:0] BANK_SLIM_N_COEFF = 2'd2;
-localparam [1:0] BANK_SLIM_N_COEFF_EXT = 2'd3;
+localparam [2:0] BANK_FAT_T1T2 = 3'd0;
+localparam [2:0] BANK_FAT_ABL = 3'd1;
+localparam [2:0] BANK_FAT_ABH = 3'd2;
+localparam [2:0] BANK_FAT_N = 3'd3;
+localparam [2:0] BANK_FAT_ML = 3'd4;
+localparam [2:0] BANK_FAT_MH = 3'd5;
+localparam [2:0] BANK_FAT_EXT = 3'd6; // 0 -> MH'
+localparam [2:0] BANK_FAT_UNUSED = 3'd7;
+
+localparam [1:0] BANK_SLIM_T1T2 = 2'd0;
+localparam [1:0] BANK_SLIM_N_COEFF = 2'd1;
+localparam [1:0] BANK_SLIM_Q = 2'd2;
+localparam [1:0] BANK_SLIM_EXT = 2'd3; // 0 -> N_COEFF', 1 -> Q'
//localparam BANK_Y_T2 = 3'd0;
diff --git a/rtl/modexpng_part_recombinator.v b/rtl/modexpng_part_recombinator.v
index c51e7ef..567ecd5 100644
--- a/rtl/modexpng_part_recombinator.v
+++ b/rtl/modexpng_part_recombinator.v
@@ -9,7 +9,8 @@ module modexpng_part_recombinator
dsp_x_p, dsp_y_p,
col_index, col_index_last,
slim_bram_xy_addr, slim_bram_xy_bank,
- fat_bram_xy_bank, fat_bram_xy_addr, fat_bram_x_dout, fat_bram_y_dout, fat_bram_xy_dout_valid
+ rcmb_fat_bram_xy_bank, rcmb_fat_bram_xy_addr, rcmb_fat_bram_x_dout, rcmb_fat_bram_y_dout, rcmb_fat_bram_xy_dout_valid,
+ rcmb_slim_bram_xy_bank, rcmb_slim_bram_xy_addr, rcmb_slim_bram_x_dout, rcmb_slim_bram_y_dout, rcmb_slim_bram_xy_dout_valid
);
@@ -36,11 +37,17 @@ module modexpng_part_recombinator
input [ 7:0] slim_bram_xy_addr;
input [ 1:0] slim_bram_xy_bank;
- output [ 2:0] fat_bram_xy_bank;
- output [ 7:0] fat_bram_xy_addr;
- output [ 17:0] fat_bram_x_dout;
- output [ 17:0] fat_bram_y_dout;
- output fat_bram_xy_dout_valid;
+ output [ 2:0] rcmb_fat_bram_xy_bank;
+ output [ 7:0] rcmb_fat_bram_xy_addr;
+ output [ 17:0] rcmb_fat_bram_x_dout;
+ output [ 17:0] rcmb_fat_bram_y_dout;
+ output rcmb_fat_bram_xy_dout_valid;
+
+ output [ 2:0] rcmb_slim_bram_xy_bank;
+ output [ 7:0] rcmb_slim_bram_xy_addr;
+ output [ 17:0] rcmb_slim_bram_x_dout;
+ output [ 17:0] rcmb_slim_bram_y_dout;
+ output rcmb_slim_bram_xy_dout_valid;
//
@@ -148,10 +155,10 @@ module modexpng_part_recombinator
if (ena_x && ena_y)
//
case (fsm_state_next)
- FSM_STATE_MULT_SQUARE_COL_0_BUSY: rcmb_mode <= 2'd1;
- FSM_STATE_MULT_TRIANGLE_COL_0_BUSY: rcmb_mode <= 2'd2;
- //FSM_STATE_MULT_RECTANGLE_COL_0_BUSY: rcmb_mode <= 2'd3;
- default: rcmb_mode <= 2'd0;
+ FSM_STATE_MULT_SQUARE_COL_0_BUSY: rcmb_mode <= 2'd1;
+ FSM_STATE_MULT_TRIANGLE_COL_0_BUSY: rcmb_mode <= 2'd2;
+ FSM_STATE_MULT_RECTANGLE_COL_0_BUSY: rcmb_mode <= 2'd3;
+ default: rcmb_mode <= 2'd0;
endcase
@@ -203,7 +210,7 @@ module modexpng_part_recombinator
input [1:0] slim_bram_xy_bank_value;
begin
//
- if (slim_bram_xy_bank_value == BANK_SLIM_N_COEFF_EXT)
+ if (slim_bram_xy_bank_value == BANK_SLIM_EXT)
calc_triangle_aux_lsb = 1'b1;
else
calc_triangle_aux_lsb = 1'b0;
@@ -216,6 +223,21 @@ module modexpng_part_recombinator
end
endfunction
+ function calc_rectangle_valid_lsb;
+ input [4:0] col_index_value;
+ input [4:0] col_index_last_value;
+ input [7:0] slim_bram_xy_addr_value;
+ input [1:0] slim_bram_xy_bank_value;
+ begin
+ //
+ if (slim_bram_xy_addr_value[7:3] == col_index_value)
+ calc_rectangle_valid_lsb = slim_bram_xy_bank_value != BANK_SLIM_EXT;
+ else
+ calc_rectangle_valid_lsb = 1'b0;
+ //
+ end
+ endfunction
+
function [7:0] calc_square_bitmap_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
@@ -265,6 +287,32 @@ module modexpng_part_recombinator
//
end
endfunction
+
+ function [7:0] calc_rectangle_bitmap_lsb;
+ input [4:0] col_index_value;
+ input [4:0] col_index_last_value;
+ input [7:0] slim_bram_xy_addr_value;
+ input [1:0] slim_bram_xy_bank_value;
+ begin
+ //
+ if ((slim_bram_xy_addr_value[7:3] == col_index_value) && (slim_bram_xy_bank_value != BANK_SLIM_EXT))
+ //
+ case (slim_bram_xy_addr_value[2:0])
+ 3'b000: calc_rectangle_bitmap_lsb = 8'b00000001;
+ 3'b001: calc_rectangle_bitmap_lsb = 8'b00000010;
+ 3'b010: calc_rectangle_bitmap_lsb = 8'b00000100;
+ 3'b011: calc_rectangle_bitmap_lsb = 8'b00001000;
+ 3'b100: calc_rectangle_bitmap_lsb = 8'b00010000;
+ 3'b101: calc_rectangle_bitmap_lsb = 8'b00100000;
+ 3'b110: calc_rectangle_bitmap_lsb = 8'b01000000;
+ 3'b111: calc_rectangle_bitmap_lsb = 8'b10000000;
+ endcase
+ //
+ else
+ calc_rectangle_bitmap_lsb = {8{1'b0}};
+ //
+ end
+ endfunction
function [2:0] calc_square_index_lsb;
input [4:0] col_index_value;
@@ -315,6 +363,32 @@ module modexpng_part_recombinator
//
end
endfunction
+
+ function [2:0] calc_rectangle_index_lsb;
+ input [4:0] col_index_value;
+ input [4:0] col_index_last_value;
+ input [7:0] slim_bram_xy_addr_value;
+ input [1:0] slim_bram_xy_bank_value;
+ begin
+ //
+ if ((slim_bram_xy_addr_value[7:3] == col_index_value) && (slim_bram_xy_bank_value != BANK_SLIM_EXT))
+ //
+ case (slim_bram_xy_addr_value[2:0])
+ 3'b000: calc_rectangle_index_lsb = 3'd0;
+ 3'b001: calc_rectangle_index_lsb = 3'd1;
+ 3'b010: calc_rectangle_index_lsb = 3'd2;
+ 3'b011: calc_rectangle_index_lsb = 3'd3;
+ 3'b100: calc_rectangle_index_lsb = 3'd4;
+ 3'b101: calc_rectangle_index_lsb = 3'd5;
+ 3'b110: calc_rectangle_index_lsb = 3'd6;
+ 3'b111: calc_rectangle_index_lsb = 3'd7;
+ endcase
+ //
+ else
+ calc_rectangle_index_lsb = 3'dX;
+ //
+ end
+ endfunction
function calc_square_purge_lsb;
input [4:0] col_index_value;
@@ -330,6 +404,20 @@ module modexpng_part_recombinator
end
endfunction
+ function calc_rectangle_purge_lsb;
+ input [4:0] col_index_value;
+ input [4:0] col_index_last_value;
+ input [7:0] slim_bram_xy_addr_value;
+ begin
+ //
+ if (slim_bram_xy_addr_value[7:3] == col_index_value)
+ calc_rectangle_purge_lsb = slim_bram_xy_addr_value[7:3] == col_index_last_value;
+ else
+ calc_rectangle_purge_lsb = 1'b0;
+ //
+ end
+ endfunction
+
function calc_square_valid_msb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
@@ -344,6 +432,22 @@ module modexpng_part_recombinator
//
end
endfunction
+
+ function calc_rectangle_valid_msb;
+ input [4:0] col_index_value;
+ input [4:0] col_index_last_value;
+ input [7:0] slim_bram_xy_addr_value;
+ input [1:0] slim_bram_xy_bank_value;
+ input [7:0] index_last_value;
+ begin
+ //
+ if ((slim_bram_xy_addr_value == 8'd1) && (slim_bram_xy_bank_value == BANK_SLIM_EXT))
+ calc_rectangle_valid_msb = 1'b1;
+ else
+ calc_rectangle_valid_msb = 1'b0;
+ //
+ end
+ endfunction
function [7:0] calc_square_bitmap_msb;
input [4:0] col_index_value;
@@ -361,6 +465,22 @@ module modexpng_part_recombinator
end
endfunction
+ function [7:0] calc_rectangle_bitmap_msb;
+ input [4:0] col_index_value;
+ input [4:0] col_index_last_value;
+ input [7:0] slim_bram_xy_addr_value;
+ input [1:0] slim_bram_xy_bank_value;
+ input [7:0] index_last_value;
+ begin
+ //
+ if ((slim_bram_xy_addr_value == 8'd1) && (slim_bram_xy_bank_value == BANK_SLIM_EXT)) begin
+ calc_rectangle_bitmap_msb[7:0] = 8'b11111111;
+ end else
+ calc_rectangle_bitmap_msb[7:0] = 8'b00000000;
+ //
+ end
+ endfunction
+
function calc_square_purge_msb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
@@ -376,6 +496,22 @@ module modexpng_part_recombinator
end
endfunction
+ function calc_rectangle_purge_msb;
+ input [4:0] col_index_value;
+ input [4:0] col_index_last_value;
+ input [7:0] slim_bram_xy_addr_value;
+ input [1:0] slim_bram_xy_bank_value;
+ input [7:0] index_last_value;
+ begin
+ //
+ if ((slim_bram_xy_addr_value == 8'd1) && (slim_bram_xy_bank_value == BANK_SLIM_EXT))
+ calc_rectangle_purge_msb = col_index_value == col_index_last_value;
+ else
+ calc_rectangle_purge_msb = 1'b0;
+ //
+ end
+ endfunction
+
reg recomb_lsb_ce = 1'b0;
reg recomb_lsb_ce_aux;
@@ -494,7 +630,24 @@ module modexpng_part_recombinator
xy_bitmap_msb_adv[6] <= {8{1'b0}};
xy_purge_msb_adv [6] <= 1'b0;
//
- end
+ end
+ //
+ FSM_STATE_MULT_RECTANGLE_COL_0_TRIG,
+ FSM_STATE_MULT_RECTANGLE_COL_N_TRIG,
+ FSM_STATE_MULT_RECTANGLE_COL_0_BUSY,
+ FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: begin
+ //
+ xy_valid_lsb_adv [6] <= calc_rectangle_valid_lsb (col_index, col_index_last, slim_bram_xy_addr, slim_bram_xy_bank);
+ xy_aux_lsb_adv [6] <= 1'b0;
+ xy_bitmap_lsb_adv[6] <= calc_rectangle_bitmap_lsb(col_index, col_index_last, slim_bram_xy_addr, slim_bram_xy_bank);
+ xy_index_lsb_adv [6] <= calc_rectangle_index_lsb (col_index, col_index_last, slim_bram_xy_addr, slim_bram_xy_bank);
+ xy_purge_lsb_adv [6] <= calc_rectangle_purge_lsb (col_index, col_index_last, slim_bram_xy_addr);
+ //
+ xy_valid_msb_adv [6] <= calc_rectangle_valid_msb (col_index, col_index_last, slim_bram_xy_addr, slim_bram_xy_bank, index_last);
+ xy_bitmap_msb_adv[6] <= calc_rectangle_bitmap_msb(col_index, col_index_last, slim_bram_xy_addr, slim_bram_xy_bank, index_last);
+ xy_purge_msb_adv [6] <= calc_rectangle_purge_msb (col_index, col_index_last, slim_bram_xy_addr, slim_bram_xy_bank, index_last);
+ //
+ end
//
default: begin
//
@@ -586,15 +739,24 @@ module modexpng_part_recombinator
end
-
reg [ 2:0] fat_bram_xy_bank_reg;
reg [ 7:0] fat_bram_xy_addr_reg;
- reg [ 7:0] fat_bram_xy_cnt_lsb;
- reg [ 7:0] fat_bram_xy_cnt_msb;
reg [17:0] fat_bram_x_dout_reg;
reg [17:0] fat_bram_y_dout_reg;
reg fat_bram_xy_dout_valid_reg = 1'b0;
+ reg [ 2:0] slim_bram_xy_bank_reg;
+ reg [ 7:0] slim_bram_xy_addr_reg;
+ reg [17:0] slim_bram_x_dout_reg;
+ reg [17:0] slim_bram_y_dout_reg;
+ reg slim_bram_xy_dout_valid_reg = 1'b0;
+
+ reg [ 7:0] bram_xy_cnt_lsb;
+ reg [ 7:0] bram_xy_cnt_msb;
+
+ reg bram_xy_cnt_lsb_wrapped;
+ reg bram_xy_cnt_msb_wrapped;
+
reg [15:0] recomb_msb_dout_carry_0;
reg [15:0] recomb_msb_dout_carry_1;
@@ -606,11 +768,21 @@ module modexpng_part_recombinator
reg [ 7:0] recomb_msb_cnt_delay_1 = 8'd0;
reg [ 7:0] recomb_msb_cnt_delay_2 = 8'd0;
- assign fat_bram_xy_bank = fat_bram_xy_bank_reg;
- assign fat_bram_xy_addr = fat_bram_xy_addr_reg;
- assign fat_bram_x_dout = fat_bram_x_dout_reg;
- assign fat_bram_y_dout = fat_bram_y_dout_reg;
- assign fat_bram_xy_dout_valid = fat_bram_xy_dout_valid_reg;
+ reg recomb_msb_flag_delay_0;
+ reg recomb_msb_flag_delay_1;
+ reg recomb_msb_flag_delay_2;
+
+ assign rcmb_fat_bram_xy_bank = fat_bram_xy_bank_reg;
+ assign rcmb_fat_bram_xy_addr = fat_bram_xy_addr_reg;
+ assign rcmb_fat_bram_x_dout = fat_bram_x_dout_reg;
+ assign rcmb_fat_bram_y_dout = fat_bram_y_dout_reg;
+ assign rcmb_fat_bram_xy_dout_valid = fat_bram_xy_dout_valid_reg;
+
+ assign rcmb_slim_bram_xy_bank = slim_bram_xy_bank_reg;
+ assign rcmb_slim_bram_xy_addr = slim_bram_xy_addr_reg;
+ assign rcmb_slim_bram_x_dout = slim_bram_x_dout_reg;
+ assign rcmb_slim_bram_y_dout = slim_bram_y_dout_reg;
+ assign rcmb_slim_bram_xy_dout_valid = slim_bram_xy_dout_valid_reg;
reg rdy_reg = 1'b1;
reg rdy_adv = 1'b1;
@@ -629,7 +801,9 @@ module modexpng_part_recombinator
task advance_recomb_msb_dout_delay;
input [15:0] dout;
input [ 7:0] cnt;
+ input flag;
begin
+ //
recomb_msb_dout_delay_0 <= dout;
recomb_msb_dout_delay_1 <= recomb_msb_dout_delay_0;
recomb_msb_dout_delay_2 <= recomb_msb_dout_delay_1;
@@ -637,6 +811,11 @@ module modexpng_part_recombinator
recomb_msb_cnt_delay_0 <= cnt;
recomb_msb_cnt_delay_1 <= recomb_msb_cnt_delay_0;
recomb_msb_cnt_delay_2 <= recomb_msb_cnt_delay_1;
+ //
+ recomb_msb_flag_delay_0 <= flag;
+ recomb_msb_flag_delay_1 <= recomb_msb_flag_delay_0;
+ recomb_msb_flag_delay_2 <= recomb_msb_flag_delay_1;
+ //
end
endtask
@@ -659,10 +838,24 @@ module modexpng_part_recombinator
fat_bram_xy_addr_reg <= addr;
fat_bram_x_dout_reg <= dout_x;
fat_bram_y_dout_reg <= dout_y;
- fat_bram_xy_dout_valid_reg <= 1'b1;
+ fat_bram_xy_dout_valid_reg <= valid;
end
endtask
+ task _update_slim_bram_regs;
+ input [ 2:0] bank;
+ input [ 7:0] addr;
+ input [17:0] dout_x;
+ input [17:0] dout_y;
+ input valid;
+ begin
+ slim_bram_xy_bank_reg <= bank;
+ slim_bram_xy_addr_reg <= addr;
+ slim_bram_x_dout_reg <= dout_x;
+ slim_bram_y_dout_reg <= dout_y;
+ slim_bram_xy_dout_valid_reg <= valid;
+ end
+ endtask
task set_fat_bram_regs;
input [ 2:0] bank;
@@ -674,44 +867,73 @@ module modexpng_part_recombinator
end
endtask
+ task set_slim_bram_regs;
+ input [ 2:0] bank;
+ input [ 7:0] addr;
+ input [17:0] dout_x;
+ input [17:0] dout_y;
+ begin
+ _update_slim_bram_regs(bank, addr, dout_x, dout_y, 1'b1);
+ end
+ endtask
+
task clear_fat_bram_regs;
begin
_update_fat_bram_regs(3'bXXX, 8'hXX, {18{1'bX}}, {18{1'bX}}, 1'b0);
end
endtask
+
+ task clear_slim_bram_regs;
+ begin
+ _update_slim_bram_regs(3'bXXX, 8'hXX, {18{1'bX}}, {18{1'bX}}, 1'b0);
+ end
+ endtask
- task _set_fat_bram_cnt_lsb;
+ task _set_bram_cnt_lsb;
input [7:0] cnt;
+ input wrapped;
begin
- fat_bram_xy_cnt_lsb <= cnt;
+ bram_xy_cnt_lsb <= cnt;
+ bram_xy_cnt_lsb_wrapped <= wrapped;
end
endtask
- task _set_fat_bram_cnt_msb;
+
+ task _set_bram_cnt_msb;
input [7:0] cnt;
+ input wrapped;
begin
- fat_bram_xy_cnt_msb <= cnt;
+ bram_xy_cnt_msb <= cnt;
+ bram_xy_cnt_msb_wrapped <= wrapped;
end
endtask
- task inc_fat_bram_cnt_lsb;
+ task inc_bram_cnt_lsb;
begin
- _set_fat_bram_cnt_lsb(fat_bram_xy_cnt_lsb + 1'b1);
+ if (bram_xy_cnt_lsb == index_last)
+ _set_bram_cnt_lsb(8'd0, 1'b1);
+ else
+ _set_bram_cnt_lsb(bram_xy_cnt_lsb + 1'b1, bram_xy_cnt_lsb_wrapped);
end
endtask
- task inc_fat_bram_cnt_msb;
+
+ task inc_bram_cnt_msb;
begin
- _set_fat_bram_cnt_msb(fat_bram_xy_cnt_msb + 1'b1);
+ if (bram_xy_cnt_msb == index_last)
+ _set_bram_cnt_msb(8'd0, 1'b1);
+ else
+ _set_bram_cnt_msb(bram_xy_cnt_msb + 1'b1, bram_xy_cnt_msb_wrapped);
end
endtask
- task clr_fat_bram_cnt_lsb;
+ task clr_bram_cnt_lsb;
begin
- _set_fat_bram_cnt_lsb(8'd0);
+ _set_bram_cnt_lsb(8'd0, 1'b0);
end
endtask
- task clr_fat_bram_cnt_msb;
+
+ task clr_bram_cnt_msb;
begin
- _set_fat_bram_cnt_msb(8'd0);
+ _set_bram_cnt_msb(8'd0, 1'b0);
end
endtask
@@ -724,51 +946,53 @@ module modexpng_part_recombinator
always @(posedge clk)
//
if (ena_x & ena_y) begin
- clr_fat_bram_cnt_lsb();
- clr_fat_bram_cnt_msb();
+ clr_bram_cnt_lsb();
+ clr_bram_cnt_msb();
end else begin // if not ready???
//
case (rcmb_mode)
2'd1: recombine_square();
2'd2: recombine_triangle();
+ 2'd3: recombine_rectangle();
endcase
//
end
task recombine_square;
+ //
begin
//
case (rcmb_xy_dout_valid)
//
- 2'b01: inc_fat_bram_cnt_lsb();
- 2'b10: inc_fat_bram_cnt_msb();
+ 2'b01: inc_bram_cnt_lsb();
+ 2'b10: inc_bram_cnt_msb();
2'b11: begin
- if (fat_bram_xy_cnt_lsb == index_last) clr_fat_bram_cnt_lsb();
- else inc_fat_bram_cnt_lsb();
- inc_fat_bram_cnt_msb();
+ inc_bram_cnt_lsb();
+ inc_bram_cnt_msb();
end
//
endcase
//
case (rcmb_xy_dout_valid)
//
- 2'b00: if (recomb_msb_cnt_delay_2 > 8'd0) set_fat_bram_regs(BANK_FAT_ABH, recomb_msb_cnt_delay_2, {2'b00, recomb_msb_dout_delay_2}, {18{1'bX}});
- else clear_fat_bram_regs();
- 2'b01: set_fat_bram_regs(BANK_FAT_ABL, fat_bram_xy_cnt_lsb, {2'b00, recomb_lsb_dout}, {18{1'bX}});
- 2'b10: if (fat_bram_xy_cnt_msb < 8'd2) clear_fat_bram_regs();
- else set_fat_bram_regs(BANK_FAT_ABH, fat_bram_xy_cnt_msb, {2'b00, recomb_msb_dout}, {18{1'bX}});
- 2'b11: if (fat_bram_xy_cnt_lsb < index_last) set_fat_bram_regs(BANK_FAT_ABH, fat_bram_xy_cnt_lsb, {1'b0, {1'b0, recomb_lsb_dout} + {1'b0, recomb_msb_dout_carry_1}}, {18{1'bX}});
- else set_fat_bram_regs(BANK_FAT_ABL, fat_bram_xy_cnt_lsb, {2'b00, recomb_lsb_dout}, {18{1'bX}});
+ 2'b00: if (recomb_msb_flag_delay_2) set_fat_bram_regs(BANK_FAT_ABH, recomb_msb_cnt_delay_2, {2'b00, recomb_msb_dout_delay_2}, {18{1'bX}});
+ else clear_fat_bram_regs();
+ 2'b01: set_fat_bram_regs(BANK_FAT_ABL, bram_xy_cnt_lsb, {2'b00, recomb_lsb_dout}, {18{1'bX}});
+ 2'b10: if (bram_xy_cnt_msb < 8'd2) clear_fat_bram_regs();
+ else set_fat_bram_regs(BANK_FAT_ABH, bram_xy_cnt_msb, {2'b00, recomb_msb_dout}, {18{1'bX}});
+ 2'b11: if (bram_xy_cnt_lsb_wrapped) set_fat_bram_regs(BANK_FAT_ABH, bram_xy_cnt_lsb, {1'b0, {1'b0, recomb_lsb_dout} + {1'b0, recomb_msb_dout_carry_1}}, {18{1'bX}});
+ else set_fat_bram_regs(BANK_FAT_ABL, bram_xy_cnt_lsb, {2'b00, recomb_lsb_dout}, {18{1'bX}});
+ default: clear_fat_bram_regs(); // DEBUG!!!
//
endcase
//
case (rcmb_xy_dout_valid)
//
- 2'b00: if (recomb_msb_cnt_delay_2 > 8'd0) advance_recomb_msb_dout_delay(16'hXXXX, 8'd0);
- 2'b10: if (fat_bram_xy_cnt_msb < 8'd2) shift_recomb_msb_dout_carry(recomb_msb_dout);
- //
- 2'b11: begin advance_recomb_msb_dout_delay(recomb_msb_dout, fat_bram_xy_cnt_msb);
- if (fat_bram_xy_cnt_lsb < index_last) shift_recomb_msb_dout_carry({16{1'bX}});
+ 2'b00: if (recomb_msb_flag_delay_2) advance_recomb_msb_dout_delay(16'hXXXX, 8'd0, 1'b0);
+ 2'b10: if (bram_xy_cnt_msb < 8'd2) shift_recomb_msb_dout_carry(recomb_msb_dout);
+// //
+ 2'b11: begin advance_recomb_msb_dout_delay(recomb_msb_dout, bram_xy_cnt_msb, 1'b1);
+ if (bram_xy_cnt_lsb_wrapped) shift_recomb_msb_dout_carry({16{1'bX}});
end
//
endcase
@@ -779,50 +1003,111 @@ module modexpng_part_recombinator
task recombine_triangle;
+ //
begin
//
case (rcmb_xy_dout_valid)
//
- 2'b01: begin inc_fat_bram_cnt_lsb();
- if (fat_bram_xy_cnt_lsb == index_last) inc_fat_bram_cnt_msb();
- end
- //
+ 2'b01: inc_bram_cnt_lsb();
+ //
endcase
//
case (rcmb_xy_dout_valid)
//
- 2'b00: clear_fat_bram_regs();
- 2'b01: if (fat_bram_xy_cnt_msb == 8'd0) set_fat_bram_regs(BANK_FAT_Q, fat_bram_xy_cnt_lsb, {2'b00, recomb_lsb_dout}, {18{1'bX}});
- else set_fat_bram_regs(BANK_FAT_Q_EXT, fat_bram_xy_cnt_lsb, {2'b00, recomb_lsb_dout}, {18{1'bX}});
+ 2'b00: clear_slim_bram_regs();
+ 2'b01: if (!bram_xy_cnt_lsb_wrapped) set_slim_bram_regs(BANK_SLIM_Q, bram_xy_cnt_lsb, {2'b00, recomb_lsb_dout}, {18{1'bX}});
+ else set_slim_bram_regs(BANK_SLIM_EXT, 8'd1, {2'b00, recomb_lsb_dout}, {18{1'bX}});
+ 2'b10: clear_slim_bram_regs();
+ 2'b11: clear_slim_bram_regs();
//
endcase
//
end
+ //
endtask
+
+ task recombine_rectangle;
+ //
+ begin
+ //
+ case (rcmb_xy_dout_valid)
+ //
+ 2'b01: inc_bram_cnt_lsb();
+ 2'b10: inc_bram_cnt_msb();
+ 2'b11: begin
+ inc_bram_cnt_lsb();
+ inc_bram_cnt_msb();
+ end
+ //
+ endcase
+// //
+ case (rcmb_xy_dout_valid)
+// //
+ 2'b00: if (recomb_msb_flag_delay_2) set_fat_bram_regs(BANK_FAT_MH, recomb_msb_cnt_delay_2, {2'b00, recomb_msb_dout_delay_2}, {18{1'bX}});
+ else clear_fat_bram_regs();
+ 2'b01: set_fat_bram_regs(BANK_FAT_ML, bram_xy_cnt_lsb, {2'b00, recomb_lsb_dout}, {18{1'bX}});
+ 2'b10: if (!bram_xy_cnt_msb_wrapped) begin
+ if (bram_xy_cnt_msb < 8'd2) clear_fat_bram_regs();
+ else set_fat_bram_regs(BANK_FAT_MH, bram_xy_cnt_msb, {2'b00, recomb_msb_dout}, {18{1'bX}});
+ end else
+ set_fat_bram_regs(BANK_FAT_EXT, 8'd0, {2'b00, recomb_msb_dout}, {18{1'bX}});
+
+ 2'b11: set_fat_bram_regs(BANK_FAT_MH, bram_xy_cnt_lsb, {1'b0, {1'b0, recomb_lsb_dout} + {1'b0, recomb_msb_dout_carry_1}}, {18{1'bX}});
+// //
+ endcase
+// //
+ case (rcmb_xy_dout_valid)
+// //
+ 2'b00: if (recomb_msb_flag_delay_2) advance_recomb_msb_dout_delay(16'hXXXX, 8'd0, 1'b0);
+ 2'b10: begin
+ if ((bram_xy_cnt_msb < 8'd2) && !bram_xy_cnt_msb_wrapped) shift_recomb_msb_dout_carry(recomb_msb_dout);
+ if (bram_xy_cnt_msb_wrapped) advance_recomb_msb_dout_delay(16'hXXXX, 8'd0, 1'b0);
+ end
+// //
+ 2'b11: begin advance_recomb_msb_dout_delay(recomb_msb_dout, bram_xy_cnt_msb, 1'b1);
+ shift_recomb_msb_dout_carry({16{1'bX}});
+ end
+// //
+ endcase
+ //
+ end
+ //
+ endtask
always @(posedge clk)
//
if (ena_x & ena_y) begin
rdy_adv <= 1'b0;
- end else begin
+ end else if (!rdy_reg) begin
//
- case ({recomb_x_msb_dout_valid, recomb_x_lsb_dout_valid})
+ case (rcmb_mode)
+ //
+ 2'd1: case (rcmb_xy_dout_valid)
+ //
+ 2'b00: begin
+ //
+ if (recomb_msb_flag_delay_2) begin
+ //
+ rdy_adv <= ~recomb_msb_flag_delay_1;
+ //
+ end
+ //
+ end
+ endcase
+ //
+ 2'd2: case (rcmb_xy_dout_valid)
+ //
+ 2'b01: rdy_adv <= bram_xy_cnt_lsb_wrapped; //
+ //
+ endcase
//
- 2'b00: begin
- //
- if (recomb_msb_cnt_delay_2 > 8'd0) begin
- //
- rdy_adv <= recomb_msb_cnt_delay_1 == 8'd0;
- //
- end
- //
- end
endcase
//
end
+ // add ready for mode=3
endmodule
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