diff options
Diffstat (limited to 'rtl/modexpng_recombinator_cell.v')
| -rw-r--r-- | rtl/modexpng_recombinator_cell.v | 49 |
1 files changed, 23 insertions, 26 deletions
diff --git a/rtl/modexpng_recombinator_cell.v b/rtl/modexpng_recombinator_cell.v index 9761d9c..45fc68c 100644 --- a/rtl/modexpng_recombinator_cell.v +++ b/rtl/modexpng_recombinator_cell.v @@ -33,8 +33,7 @@ module modexpng_recombinator_cell ( clk, - ce, clr, cry, - cin, + ce, clr, din, dout, dout_ext ); @@ -53,8 +52,6 @@ module modexpng_recombinator_cell input clk; input ce; input clr; - input cry; - input [WORD_W -1:0] cin; input [ MAC_W -1:0] din; output [WORD_W -1:0] dout; output [WORD_W :0] dout_ext; @@ -83,42 +80,42 @@ module modexpng_recombinator_cell wire [DSP48E1_C_W-1:0] c_int; wire [DSP48E1_P_W-1:0] p_int; - assign {a_int, b_int} = {{(DSP48E1_C_W-WORD_W){1'b0}}, cin}; - assign {c_int} = {din_z, 1'b0, din_y, 1'b1, din_x}; - + assign {a_int, b_int} = {{(DSP48E1_C_W-(2*WORD_W+1)){1'b0}}, din_z, din_y[WORD_W-1], din_y}; + assign {c_int} = {{(DSP48E1_C_W-(2*WORD_W+1)){1'b0}}, WORD_ZERO, din_x[WORD_W-1], din_x}; // // Combinational OPMODE Switch // reg [DSP48E1_OPMODE_W-1:0] opmode; - always @(clr, cry) + always @(clr) // - casez ({clr, cry}) // clr has priority over cry! - 2'b1?: opmode = DSP48E1_OPMODE_Z0_YC_X0; - 2'b00: opmode = DSP48E1_OPMODE_ZP17_YC_X0; - 2'b01: opmode = DSP48E1_OPMODE_ZP17_YC_XAB; + case (clr) + 1'b1: opmode = DSP48E1_OPMODE_Z0_YC_X0; + 1'b0: opmode = DSP48E1_OPMODE_ZP17_YC_XAB; endcase // // DSP Slice Instance // - `MODEXPNG_DSP_SLICE_ADDSUB dsp_inst + `MODEXPNG_DSP_SLICE_ADDSUB #(.AB_REG(2)) dsp_inst ( - .clk (clk), - .ce_abc (ce), - .ce_p (ce_dly), - .ce_ctrl (ce), - .x ({a_int, b_int}), - .y (c_int), - .p (p_int), - .op_mode (opmode), - .alu_mode (DSP48E1_ALUMODE_Z_PLUS_X_AND_Y_AND_CIN), - .carry_in_sel (DSP48E1_CARRYINSEL_CARRYIN), - .casc_p_in (), - .casc_p_out (), - .carry_out () + .clk (clk), + .ce_ab1 (ce), + .ce_ab2 (ce_dly), + .ce_c (ce), + .ce_p (ce_dly), + .ce_ctrl (ce), + .ab ({a_int, b_int}), + .c (c_int), + .p (p_int), + .op_mode (opmode), + .alu_mode (DSP48E1_ALUMODE_Z_PLUS_X_AND_Y_AND_CIN), + .carry_in_sel (DSP48E1_CARRYINSEL_CARRYIN), + .casc_p_in (), + .casc_p_out (), + .carry_out () ); |