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Diffstat (limited to 'rtl/modexpng_mmm_dual.v')
-rw-r--r--rtl/modexpng_mmm_dual.v28
1 files changed, 24 insertions, 4 deletions
diff --git a/rtl/modexpng_mmm_dual.v b/rtl/modexpng_mmm_dual.v
index df0f823..babd565 100644
--- a/rtl/modexpng_mmm_dual.v
+++ b/rtl/modexpng_mmm_dual.v
@@ -45,7 +45,7 @@ module modexpng_mmm_dual
rcmb_y_dout,
rcmb_xy_valid,
- rdct_ena
+ rdct_ena, rdct_rdy
);
@@ -110,6 +110,7 @@ module modexpng_mmm_dual
output rcmb_xy_valid;
output rdct_ena;
+ input rdct_rdy;
//
@@ -928,7 +929,11 @@ module modexpng_mmm_dual
FSM_STATE_MULT_RECTANGLE_COL_N_TRIG: fsm_state_next = FSM_STATE_MULT_RECTANGLE_COL_N_BUSY ;
FSM_STATE_MULT_RECTANGLE_COL_N_BUSY: fsm_state_next = rectangle_done ? fsm_state_after_mult_rectangle : FSM_STATE_MULT_RECTANGLE_COL_N_BUSY;
- FSM_STATE_MULT_RECTANGLE_HOLDOFF: fsm_state_next = rcmb_rdy ? FSM_STATE_STOP : FSM_STATE_MULT_RECTANGLE_HOLDOFF;
+ FSM_STATE_MULT_RECTANGLE_HOLDOFF: fsm_state_next = rcmb_rdy ? FSM_STATE_WAIT_REDUCTOR : FSM_STATE_MULT_RECTANGLE_HOLDOFF;
+
+ FSM_STATE_WAIT_REDUCTOR: fsm_state_next = rdct_rdy ? FSM_STATE_STOP : FSM_STATE_WAIT_REDUCTOR;
+
+ FSM_STATE_STOP: fsm_state_next = FSM_STATE_IDLE ;
default: fsm_state_next = FSM_STATE_IDLE ;
@@ -944,13 +949,28 @@ module modexpng_mmm_dual
assign rdct_ena = rdct_ena_reg;
- always @(posedge clk) // add reset!!!
+ always @(posedge clk)
//
- case (fsm_state)
+ if (rst) rdct_ena_reg <= 1'b0;
+ else case (fsm_state)
FSM_STATE_MULT_RECTANGLE_COL_0_INIT: rdct_ena_reg <= 1'b1;
default: rdct_ena_reg <= 1'b0;
endcase
+ //
+ // Ready Logic
+ //
+ reg rdy_reg = 1'b1;
+
+ assign rdy = rdy_reg;
+
+ always @(posedge clk)
+ //
+ if (rst) rdy_reg <= 1'b1;
+ else begin
+ if (rdy && ena) rdy_reg <= 1'b0;
+ if (!rdy && (fsm_state == FSM_STATE_STOP)) rdy_reg <= 1'b1;
+ end
endmodule