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Diffstat (limited to 'rtl/modexpng_dsp_slice_wrapper_xilinx.v')
-rw-r--r--rtl/modexpng_dsp_slice_wrapper_xilinx.v18
1 files changed, 8 insertions, 10 deletions
diff --git a/rtl/modexpng_dsp_slice_wrapper_xilinx.v b/rtl/modexpng_dsp_slice_wrapper_xilinx.v
index 9c1a60d..8c0b969 100644
--- a/rtl/modexpng_dsp_slice_wrapper_xilinx.v
+++ b/rtl/modexpng_dsp_slice_wrapper_xilinx.v
@@ -30,13 +30,11 @@ module modexpng_dsp_slice_wrapper_xilinx #
input [ DSP48E1_INMODE_W -1:0] inmode;
input [ DSP48E1_OPMODE_W -1:0] opmode;
input [DSP48E1_ALUMODE_W -1:0] alumode;
- input [ WORD_EXT_W -1:0] casc_a_in;
- input [ WORD_W -1:0] casc_b_in;
- output [ WORD_EXT_W -1:0] casc_a_out;
- output [ WORD_W -1:0] casc_b_out;
+ input [ DSP48E1_A_W -1:0] casc_a_in;
+ input [ DSP48E1_B_W -1:0] casc_b_in;
+ output [ DSP48E1_A_W -1:0] casc_a_out;
+ output [ DSP48E1_B_W -1:0] casc_b_out;
- wire [DSP48E1_A_W - WORD_EXT_W -1:0] casc_a_dummy;
- wire [DSP48E1_B_W - WORD_W -1:0] casc_b_dummy;
wire [DSP48E1_P_W - MAC_W -1:0] p_dummy;
DSP48E1 #
@@ -99,10 +97,10 @@ module modexpng_dsp_slice_wrapper_xilinx #
.OPMODE (opmode),
.ALUMODE (alumode),
- .ACIN ({{(DSP48E1_A_W-WORD_EXT_W){1'b0}}, casc_a_in}),
- .BCIN ({{(DSP48E1_B_W-WORD_W){1'b0}}, casc_b_in}),
- .ACOUT ({casc_a_dummy, casc_a_out}),
- .BCOUT ({casc_b_dummy, casc_b_out}),
+ .ACIN (casc_a_in),
+ .BCIN (casc_b_in),
+ .ACOUT (casc_a_out),
+ .BCOUT (casc_b_out),
.PCIN ({DSP48E1_P_W{1'b0}}),
.PCOUT (),
.CARRYCASCIN (1'b0),