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-rw-r--r--rtl/dsp/dsp_array.v143
1 files changed, 0 insertions, 143 deletions
diff --git a/rtl/dsp/dsp_array.v b/rtl/dsp/dsp_array.v
deleted file mode 100644
index 2a050d4..0000000
--- a/rtl/dsp/dsp_array.v
+++ /dev/null
@@ -1,143 +0,0 @@
-module dsp_array
-(
- input clk,
-
- input ce_a,
- input ce_b,
- input ce_m,
- input ce_p,
- input ce_mode,
-
- input [9 -1:0] mode_z,
-
- input [5*18-1:0] a,
- input [1*17-1:0] b,
- output [9*47-1:0] p
-);
-
- `include "../modexpng_parameters_x8.vh"
-
- wire [17:0] casc_a[0:3];
- wire [16:0] casc_b[0:3];
-
- wire ce_a0 = ce_a;
- reg ce_a1 = 1'b0;
- reg ce_a2 = 1'b0;
-
- wire ce_b0 = ce_b;
- reg ce_b1 = 1'b0;
-
- always @(posedge clk) begin
- ce_a1 <= ce_a0;
- ce_a2 <= ce_a1;
- ce_b1 <= ce_b0;
- end
-
-
- genvar z;
- generate for (z=0; z<(NUM_MULTS/2); z=z+1)
- //
- begin : gen_DSP48E1
- //
- dsp_slice #
- (
- .AB_INPUT("DIRECT"),
- .B_REG(2)
- )
- dsp_direct
- (
- .clk (clk),
-
- .ce_a1 (ce_a0),
- .ce_b1 (ce_b0),
- .ce_a2 (ce_a1),
- .ce_b2 (ce_b1),
- .ce_m (ce_m),
- .ce_p (ce_p),
- .ce_mode (ce_mode),
-
- .a (a[z*18+:18]),
- .b (b),
- .p (p[47*2*z+:47]),
-
- .inmode (5'b00000),
- .opmode ({1'b0, mode_z[2*z], 1'b0, 2'b01, 2'b01}),
- .alumode (4'b0000),
-
- .casc_a_in ({18{1'b0}}),
- .casc_b_in ({17{1'b0}}),
-
- .casc_a_out (casc_a[z]),
- .casc_b_out (casc_b[z])
- );
- //
- dsp_slice #
- (
- .AB_INPUT("CASCADE"),
- .B_REG(1)
- )
- dsp_cascade
- (
- .clk (clk),
-
- .ce_a1 (ce_a1),
- .ce_b1 (1'b0),
- .ce_a2 (ce_a2),
- .ce_b2 (ce_b1),
- .ce_m (ce_m),
- .ce_p (ce_p),
- .ce_mode (ce_mode),
-
- .a (a[z*18+:18]),
- .b (b),
- .p (p[47*(2*z+1)+:47]),
-
- .inmode (5'b00000),
- .opmode ({1'b0, mode_z[2*z+1], 1'b0, 2'b01, 2'b01}),
- .alumode (4'b0000),
-
- .casc_a_in (casc_a[z]),
- .casc_b_in (casc_b[z]),
-
- .casc_a_out (),
- .casc_b_out ()
- );
- //
- end
- //
- endgenerate
-
- dsp_slice #
- (
- .AB_INPUT("DIRECT"),
- .B_REG(2)
- )
- dsp_aux
- (
- .clk (clk),
-
- .ce_a1 (ce_a0),
- .ce_b1 (ce_b0),
- .ce_a2 (ce_a1),
- .ce_b2 (ce_b1),
- .ce_m (ce_m),
- .ce_p (ce_p),
- .ce_mode (ce_mode),
-
- .a (a[4*18+:18]),
- .b (b),
- .p (p[47*2*4+:47]),
-
- .inmode (5'b00000),
- .opmode ({1'b0, mode_z[2*4], 1'b0, 2'b01, 2'b01}),
- .alumode (4'b0000),
-
- .casc_a_in ({18{1'b0}}),
- .casc_b_in ({17{1'b0}}),
-
- .casc_a_out (),
- .casc_b_out ()
- );
-
-
-endmodule