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//------------------------------------------------------------------------------
//
// ecdsa_fpga_modular.h
// -------------------------------------
// Modular arithmetic routines for ECDSA
//
// Authors: Pavel Shatov
//
// Copyright (c) 2015-2016, 2018, 2021 NORDUnet A/S
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// - Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// - Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
//
// - Neither the name of the NORDUnet nor the names of its contributors may be
// used to endorse or promote products derived from this software without
// specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// ECDSA Parameters (P-256)
//------------------------------------------------------------------------------
/* Field Size */
#define ECDSA_P256_Q_INIT \
{0xffffffff, 0x00000001, 0x00000000, 0x00000000, \
0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}
/* Division Factor */
#define ECDSA_P256_DELTA_INIT \
{0x7fffffff, 0x80000000, 0x80000000, 0x00000000, \
0x00000000, 0x80000000, 0x00000000, 0x00000000}
//------------------------------------------------------------------------------
// ECDSA Parameters (P-384)
//------------------------------------------------------------------------------
/* Field Size */
#define ECDSA_P384_Q_INIT \
{0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, \
0xffffffff, 0xffffffff, 0xffffffff, 0xfffffffe, \
0xffffffff, 0x00000000, 0x00000000, 0xffffffff}
/* Division Factor */
#define ECDSA_P384_DELTA_INIT \
{0x7fffffff, 0xffffffff, 0xffffffff, 0xffffffff, \
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, \
0x7fffffff, 0x80000000, 0x00000000, 0x80000000}
//------------------------------------------------------------------------------
// ECDSA Parameters Switch
//------------------------------------------------------------------------------
#if USE_CURVE == 1
#define ECDSA_Q_INIT ECDSA_P256_Q_INIT
#define ECDSA_DELTA_INIT ECDSA_P256_DELTA_INIT
#elif USE_CURVE == 2
#define ECDSA_Q_INIT ECDSA_P384_Q_INIT
#define ECDSA_DELTA_INIT ECDSA_P384_DELTA_INIT
#else
BAD_CURVE
#endif
//------------------------------------------------------------------------------
// Globals
//------------------------------------------------------------------------------
extern FPGA_BUFFER ECDSA_Q;
extern FPGA_BUFFER ECDSA_DELTA;
//------------------------------------------------------------------------------
// Settings
//------------------------------------------------------------------------------
extern bool _DUMP_MODULAR_RESULTS;
//------------------------------------------------------------------------------
// Prototypes
//------------------------------------------------------------------------------
void fpga_modular_init ();
void fpga_modular_add (const FPGA_BUFFER *A, const FPGA_BUFFER *B, FPGA_BUFFER *S);
void fpga_modular_sub (const FPGA_BUFFER *A, const FPGA_BUFFER *B, FPGA_BUFFER *D);
void fpga_modular_mul (const FPGA_BUFFER *A, const FPGA_BUFFER *B, FPGA_BUFFER *P);
void fpga_modular_mul_helper_multiply (const FPGA_BUFFER *a, const FPGA_BUFFER *b, FPGA_WORD_EXTENDED *si);
void fpga_modular_mul_helper_accumulate (const FPGA_WORD_EXTENDED *si, FPGA_WORD *c);
void fpga_modular_mul_helper_reduce_p256 (const FPGA_WORD *c, FPGA_BUFFER *p);
void fpga_modular_mul_helper_reduce_p384 (const FPGA_WORD *c, FPGA_BUFFER *p);
void fpga_modular_inv23_p256 (const FPGA_BUFFER *A, FPGA_BUFFER *A2, FPGA_BUFFER *A3);
void fpga_modular_inv23_p384 (const FPGA_BUFFER *A, FPGA_BUFFER *A2, FPGA_BUFFER *A3);
void fpga_modular_inv23_p256_microcode ();
void fpga_modular_inv23_p384_microcode ();
//------------------------------------------------------------------------------
// ECDSA Prototype Switch
//------------------------------------------------------------------------------
#if USE_CURVE == 1
#define fpga_modular_mul_helper_reduce fpga_modular_mul_helper_reduce_p256
#define fpga_modular_inv23 fpga_modular_inv23_p256
#define fpga_modular_inv23_microcode fpga_modular_inv23_p256_microcode
#elif USE_CURVE == 2
#define fpga_modular_mul_helper_reduce fpga_modular_mul_helper_reduce_p384
#define fpga_modular_inv23 fpga_modular_inv23_p384
#define fpga_modular_inv23_microcode fpga_modular_inv23_p384_microcode
#else
BAD_CURVE
#endif
//------------------------------------------------------------------------------
// End-of-File
//------------------------------------------------------------------------------
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