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| author | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2021-04-12 16:30:11 +0300 |
|---|---|---|
| committer | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2021-04-12 16:30:11 +0300 |
| commit | e930850462e8cd6ea0ed4fc5327a456c59acf90b (patch) | |
| tree | f22a1a39466f35fd74f6e131f0b73dae5eb9c5fb /ecdsa_fpga_model.h | |
| parent | c94e882a3bad117fe6c260f8a4012a7305c02915 (diff) | |
* cleaned up a bit
* removed redundant check and refined microcode
* re-enabled previously forgotten test
Diffstat (limited to 'ecdsa_fpga_model.h')
| -rw-r--r-- | ecdsa_fpga_model.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/ecdsa_fpga_model.h b/ecdsa_fpga_model.h index 5228b9c..7b6a7e3 100644 --- a/ecdsa_fpga_model.h +++ b/ecdsa_fpga_model.h @@ -77,8 +77,8 @@ // Debugging Output Control //------------------------------------------------------------------------------ /** -define DUMP_CYCLE_STATES // dump R0, R1, S, T after every cycle -/**/ +#define DUMP_CYCLE_STATES // dump R0, R1, S, T after every cycle +**/ /** #define DUMP_UOP_OUTPUTS // dump every micro-operation output (lots of text!) **/ |