From 5c26d791ba611a00af3a6010c014694f6582bf12 Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Fri, 6 Apr 2018 21:52:21 +0300 Subject: * Follow more closely what Verilog does * Don't use hardcoded numbers, use the ones built into fastecdsa package * Generate more test vectors to really abuse the core and trigger the rarely used code path in the point addition procedure --- fpga_curve.cpp | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) (limited to 'fpga_curve.cpp') diff --git a/fpga_curve.cpp b/fpga_curve.cpp index 46f6f73..1efb8b6 100644 --- a/fpga_curve.cpp +++ b/fpga_curve.cpp @@ -305,9 +305,25 @@ void fpga_curve_scalar_multiply(FPGA_BUFFER *px, FPGA_BUFFER *py, FPGA_BUFFER *k FPGA_BUFFER rx, ry, rz; // intermediate result FPGA_BUFFER tx, ty, tz; // temporary variable + /* prepare for computation */ + fpga_buffer_copy(px, &rx); + fpga_buffer_copy(py, &ry); + fpga_buffer_copy(&ecdsa_one, &rz); + /* obtain quantity 2 * P */ - fpga_curve_double_jacobian(px, py, &ecdsa_one, &tx, &ty, &tz); - fpga_curve_point_to_affine(&tx, &ty, &tz, &ecdh_d_x, &ecdh_d_y); + fpga_curve_double_jacobian(&rx, &ry, &rz, &tx, &ty, &tz); + + /* copy again */ + fpga_buffer_copy(&tx, &rx); + fpga_buffer_copy(&ty, &ry); + fpga_buffer_copy(&tz, &rz); + + /* convert to affine coordinates */ + fpga_curve_point_to_affine(&rx, &ry, &rz, qx, qy); + + /* store for later reuse */ + fpga_buffer_copy(qx, &ecdh_d_x); + fpga_buffer_copy(qy, &ecdh_d_y); /* set initial value of R to point at infinity */ fpga_buffer_copy(&ecdsa_one, &rx); -- cgit v1.2.3