From 6010cb79da1b58fc5a71806273bb789840dc106b Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Wed, 23 Sep 2020 15:02:28 +0300 Subject: Turns out multi-part components were not fully converted and were not recognized properly during forward annotation. Had to do a couple of experiments to figure out how KiCAD handles this and then write some quick and dirty scripts to repair the multi-part symbols (STM32, Artix-7 and the 74_244 logic buffer were affected). --- KiCAD/rev02_24.sch | 122 +++++++++++++++++++++++++++++------------------------ 1 file changed, 67 insertions(+), 55 deletions(-) (limited to 'KiCAD/rev02_24.sch') diff --git a/KiCAD/rev02_24.sch b/KiCAD/rev02_24.sch index 91eea7f..6864878 100644 --- a/KiCAD/rev02_24.sch +++ b/KiCAD/rev02_24.sch @@ -1,5 +1,5 @@ EESchema Schematic File Version 4 -EELAYER 26 0 +EELAYER 30 0 EELAYER END $Descr B 17000 11000 encoding utf-8 @@ -17,7 +17,7 @@ Text Notes 4300 4100 0 60 ~ 12 *) FPGA Power Subsystem -- CORE Text Notes 7150 5310 0 60 ~ 12 *) VCCINT = 0.6V x (1 + 150 / 226) = 0.998V\n*) OCP_ADJ is not used (default over-current threshold)\n*) MARx are not used (output at nominal 100%)\n*) S_IN/S_OUT are not used (single regulator mode)\n*) S_DELAY is not used (single regulator mode)\n*) M/S is not used (parallel operation not needed)\n*) EA_OUT is not used (default control loop)\n*) Minimal load current is 0A, but we still place\nload of 100 Ohms just in case (gives 10 mA) -Text Notes 8520 10200 0 54 ~ 12 +Text Notes 8520 10200 0 54 ~ 11 FPGA CORE voltage regulators Text Notes 2870 6680 0 60 ~ 12 R66 @@ -50,10 +50,10 @@ C210 Text Notes 7160 7290 0 60 ~ 12 47uF $Comp -L power:GND GND_216 +L power:GND #GND_0216 U 1 1 58023E36 P 4200 9500 -F 0 "GND_216" H 4200 9500 20 0000 C CNN +F 0 "#GND_0216" H 4200 9500 20 0000 C CNN F 1 "+GND" H 4200 9430 30 0000 C CNN F 2 "" H 4200 9500 70 0000 C CNN F 3 "" H 4200 9500 70 0000 C CNN @@ -61,10 +61,10 @@ F 3 "" H 4200 9500 70 0000 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND GND_217 +L power:GND #GND_0217 U 1 1 58023E35 P 4700 9500 -F 0 "GND_217" H 4700 9500 20 0000 C CNN +F 0 "#GND_0217" H 4700 9500 20 0000 C CNN F 1 "+GND" H 4700 9430 30 0000 C CNN F 2 "" H 4700 9500 70 0000 C CNN F 3 "" H 4700 9500 70 0000 C CNN @@ -72,10 +72,10 @@ F 3 "" H 4700 9500 70 0000 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND GND_218 +L power:GND #GND_0218 U 1 1 58023E34 P 3400 9500 -F 0 "GND_218" H 3400 9500 20 0000 C CNN +F 0 "#GND_0218" H 3400 9500 20 0000 C CNN F 1 "+GND" H 3400 9430 30 0000 C CNN F 2 "" H 3400 9500 70 0000 C CNN F 3 "" H 3400 9500 70 0000 C CNN @@ -83,10 +83,10 @@ F 3 "" H 3400 9500 70 0000 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND GND_219 +L power:GND #GND_0219 U 1 1 58023E33 P 1800 7000 -F 0 "GND_219" H 1800 7000 20 0000 C CNN +F 0 "#GND_0219" H 1800 7000 20 0000 C CNN F 1 "+GND" H 1800 6930 30 0000 C CNN F 2 "" H 1800 7000 70 0000 C CNN F 3 "" H 1800 7000 70 0000 C CNN @@ -94,10 +94,10 @@ F 3 "" H 1800 7000 70 0000 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND GND_220 +L power:GND #GND_0220 U 1 1 58023E32 P 2200 7000 -F 0 "GND_220" H 2200 7000 20 0000 C CNN +F 0 "#GND_0220" H 2200 7000 20 0000 C CNN F 1 "+GND" H 2200 6930 30 0000 C CNN F 2 "" H 2200 7000 70 0000 C CNN F 3 "" H 2200 7000 70 0000 C CNN @@ -105,10 +105,10 @@ F 3 "" H 2200 7000 70 0000 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND GND_221 +L power:GND #GND_0221 U 1 1 58023E31 P 5900 7600 -F 0 "GND_221" H 5900 7600 20 0000 C CNN +F 0 "#GND_0221" H 5900 7600 20 0000 C CNN F 1 "+GND" H 5900 7530 30 0000 C CNN F 2 "" H 5900 7600 70 0000 C CNN F 3 "" H 5900 7600 70 0000 C CNN @@ -116,10 +116,10 @@ F 3 "" H 5900 7600 70 0000 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND GND_222 +L power:GND #GND_0222 U 1 1 58023E30 P 6600 7600 -F 0 "GND_222" H 6600 7600 20 0000 C CNN +F 0 "#GND_0222" H 6600 7600 20 0000 C CNN F 1 "+GND" H 6600 7530 30 0000 C CNN F 2 "" H 6600 7600 70 0000 C CNN F 3 "" H 6600 7600 70 0000 C CNN @@ -127,10 +127,10 @@ F 3 "" H 6600 7600 70 0000 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND GND_223 +L power:GND #GND_0223 U 1 1 58023E2F P 7100 7600 -F 0 "GND_223" H 7100 7600 20 0000 C CNN +F 0 "#GND_0223" H 7100 7600 20 0000 C CNN F 1 "+GND" H 7100 7530 30 0000 C CNN F 2 "" H 7100 7600 70 0000 C CNN F 3 "" H 7100 7600 70 0000 C CNN @@ -138,10 +138,10 @@ F 3 "" H 7100 7600 70 0000 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND GND_224 +L power:GND #GND_0224 U 1 1 58023E2E P 7600 7600 -F 0 "GND_224" H 7600 7600 20 0000 C CNN +F 0 "#GND_0224" H 7600 7600 20 0000 C CNN F 1 "+GND" H 7600 7530 30 0000 C CNN F 2 "" H 7600 7600 70 0000 C CNN F 3 "" H 7600 7600 70 0000 C CNN @@ -149,10 +149,10 @@ F 3 "" H 7600 7600 70 0000 C CNN 1 0 0 -1 $EndComp $Comp -L Cryptech_Alpha:VCC_5V0 VCC_5V0_3 +L Cryptech_Alpha:VCC_5V0 #VCC_5V0_03 U 1 1 58023E2D P 1600 6200 -F 0 "VCC_5V0_3" H 1600 6200 20 0000 C CNN +F 0 "#VCC_5V0_03" H 1600 6200 20 0000 C CNN F 1 "+VCC_5V0" H 1600 6130 30 0000 C CNN F 2 "" H 1600 6200 70 0000 C CNN F 3 "" H 1600 6200 70 0000 C CNN @@ -175,7 +175,7 @@ Wire Wire Line 7600 7400 7600 7600 Wire Wire Line 8300 6400 8100 6400 -Text Label 8300 6400 0 48 ~ 0 +Text Label 8300 6400 0 48 ~ 0 FPGA_VCCINT_1V0 Wire Wire Line 1600 6200 1600 6400 @@ -205,7 +205,7 @@ Connection ~ 2800 6400 Connection ~ 1800 6400 Wire Wire Line 5600 9100 5300 9100 -Text GLabel 5600 9100 2 48 Output ~ 0 +Text GLabel 5600 9100 2 48 Output ~ 0 POK_VCCINT Wire Wire Line 3600 9100 3400 9100 @@ -219,7 +219,7 @@ Wire Wire Line 3200 5900 3200 6800 Wire Wire Line 3200 5900 2700 5900 -Text GLabel 2700 5900 0 48 Input ~ 0 +Text GLabel 2700 5900 0 48 Input ~ 0 PWR_ENA_VCCINT Wire Wire Line 5500 7600 5300 7600 @@ -268,7 +268,7 @@ Wire Wire Line Wire Wire Line 6200 6800 6200 7000 Connection ~ 5900 7000 -Text Notes 3900 5400 0 72 ~ 12 +Text Notes 3900 5400 0 72 ~ 14 U16 Wire Wire Line 3600 5600 3600 5500 @@ -334,25 +334,29 @@ F 1 "4.7k" V 2730 6630 60 0000 R TNN F 2 "Cryptech_Alpha_Footprints:R_0402" H 2730 6630 60 0001 C CNN F 3 "" H 2730 6630 60 0000 C CNN 1 2800 6700 - 0 -1 -1 0 + 0 -1 -1 0 $EndComp $Comp L Cryptech_Alpha:C-EUC1210 C209 U 1 1 58023E2B P 6600 7100 F 0 "C209" H 6680 6910 60 0000 L BNN - 1 6600 7100 - 1 0 0 -1 +F 1 "~" H 6600 7100 50 0001 C CNN F 2 "Cryptech_Alpha_Footprints:C_1210" H 6680 6910 60 0001 C CNN +F 3 "" H 6600 7100 50 0001 C CNN + 1 6600 7100 + 1 0 0 -1 $EndComp $Comp L Cryptech_Alpha:C-EUC1210 C210 U 1 1 58023E2A P 7100 7100 F 0 "C210" H 7180 6910 60 0000 L BNN - 1 7100 7100 - 1 0 0 -1 +F 1 "~" H 7100 7100 50 0001 C CNN F 2 "Cryptech_Alpha_Footprints:C_1210" H 7180 6910 60 0001 C CNN +F 3 "" H 7100 7100 50 0001 C CNN + 1 7100 7100 + 1 0 0 -1 $EndComp $Comp L Cryptech_Alpha:EN5364QI U16 @@ -363,34 +367,40 @@ F 1 "EN5364QI" H 4510 10030 60 0000 L BNN F 2 "Cryptech_Alpha_Footprints:QFN68" H 4510 10030 60 0001 C CNN F 3 "" H 4510 10030 60 0000 C CNN 1 4400 7700 - 1 0 0 -1 + 1 0 0 -1 $EndComp $Comp L Cryptech_Alpha:C-EUC0402 C207 U 1 1 58023E28 P 3400 9200 F 0 "C207" H 2800 9150 60 0000 L BNN - 1 3400 9200 - 1 0 0 -1 +F 1 "~" H 3400 9200 50 0001 C CNN F 2 "Cryptech_Alpha_Footprints:C_0402" H 2800 9150 60 0001 C CNN +F 3 "" H 3400 9200 50 0001 C CNN + 1 3400 9200 + 1 0 0 -1 $EndComp $Comp L Cryptech_Alpha:C-EUC1210 C205 U 1 1 58023E27 P 1800 6600 F 0 "C205" H 1880 6410 60 0000 L BNN - 1 1800 6600 - 1 0 0 -1 +F 1 "~" H 1800 6600 50 0001 C CNN F 2 "Cryptech_Alpha_Footprints:C_1210" H 1880 6410 60 0001 C CNN +F 3 "" H 1800 6600 50 0001 C CNN + 1 1800 6600 + 1 0 0 -1 $EndComp $Comp L Cryptech_Alpha:C-EUC1210 C206 U 1 1 58023E26 P 2200 6600 F 0 "C206" H 2280 6410 60 0000 L BNN - 1 2200 6600 - 1 0 0 -1 +F 1 "~" H 2200 6600 50 0001 C CNN F 2 "Cryptech_Alpha_Footprints:C_1210" H 2280 6410 60 0001 C CNN +F 3 "" H 2200 6600 50 0001 C CNN + 1 2200 6600 + 1 0 0 -1 $EndComp $Comp L Cryptech_Alpha:R-EU_R0402 R68 @@ -401,7 +411,7 @@ F 1 "150k" V 5870 6950 60 0000 R TNN F 2 "Cryptech_Alpha_Footprints:R_0402" H 5870 6950 60 0001 C CNN F 3 "" H 5870 6950 60 0000 C CNN 1 5900 6700 - 0 -1 -1 0 + 0 -1 -1 0 $EndComp $Comp L Cryptech_Alpha:R-EU_R0402 R69 @@ -412,16 +422,18 @@ F 1 "226k" V 5850 7550 60 0000 R TNN F 2 "Cryptech_Alpha_Footprints:R_0402" H 5850 7550 60 0001 C CNN F 3 "" H 5850 7550 60 0000 C CNN 1 5900 7300 - 0 -1 -1 0 + 0 -1 -1 0 $EndComp $Comp L Cryptech_Alpha:C-EUC0402 C208 U 1 1 58023E23 P 6200 6600 F 0 "C208" H 6280 6410 60 0000 L BNN - 1 6200 6600 - 1 0 0 -1 +F 1 "~" H 6200 6600 50 0001 C CNN F 2 "Cryptech_Alpha_Footprints:C_0402" H 6280 6410 60 0001 C CNN +F 3 "" H 6200 6600 50 0001 C CNN + 1 6200 6600 + 1 0 0 -1 $EndComp $Comp L Cryptech_Alpha:BLM31PG330SN1_1206 FB7 @@ -432,7 +444,7 @@ F 1 "BLM31PG330SN1" H 7750 6400 60 0000 L BNN F 2 "Cryptech_Alpha_Footprints:L_1206" H 7750 6400 60 0001 C CNN F 3 "" H 7750 6400 60 0000 C CNN 1 7900 6500 - 1 0 0 -1 + 1 0 0 -1 $EndComp $Comp L Cryptech_Alpha:R-EU_R0402 R70 @@ -443,7 +455,7 @@ F 1 "100" V 7610 7100 60 0000 R TNN F 2 "Cryptech_Alpha_Footprints:R_0402" H 7610 7100 60 0001 C CNN F 3 "" H 7610 7100 60 0000 C CNN 1 7600 7200 - 0 -1 -1 0 + 0 -1 -1 0 $EndComp $Comp L Cryptech_Alpha:R-EU_R0402 R67 @@ -454,7 +466,7 @@ F 1 "0" V 5440 7540 60 0000 R TNN F 2 "Cryptech_Alpha_Footprints:R_0402" H 5440 7540 60 0001 C CNN F 3 "" H 5440 7540 60 0000 C CNN 1 5500 7300 - 0 -1 -1 0 + 0 -1 -1 0 $EndComp NoConn ~ 5300 8100 NoConn ~ 5300 8300 @@ -466,28 +478,28 @@ NoConn ~ 3600 8200 NoConn ~ 3600 8700 NoConn ~ 5300 8700 Wire Wire Line - 8300 6400 8300 6200 + 8300 6400 8300 6200 $Comp -L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR? +L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR0112 U 1 1 5AF3F25C P 8300 6200 -F 0 "#PWR?" H 8300 6050 50 0001 C CNN +F 0 "#PWR0112" H 8300 6050 50 0001 C CNN F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN F 2 "" H 8300 6200 60 0000 C CNN F 3 "" H 8300 6200 60 0000 C CNN - 1 8300 6200 - 1 0 0 -1 + 1 8300 6200 + 1 0 0 -1 $EndComp $Comp -L power:PWR_FLAG #FLG? +L power:PWR_FLAG #FLG0111 U 1 1 5AFA77EC P 8150 6400 -F 0 "#FLG?" H 8150 6475 50 0001 C CNN +F 0 "#FLG0111" H 8150 6475 50 0001 C CNN F 1 "PWR_FLAG" H 8150 6574 50 0000 C CNN F 2 "" H 8150 6400 50 0001 C CNN F 3 "~" H 8150 6400 50 0001 C CNN - 1 8150 6400 - 1 0 0 -1 + 1 8150 6400 + 1 0 0 -1 $EndComp Connection ~ 8150 6400 -$EndSCHEMATC \ No newline at end of file +$EndSCHEMATC -- cgit v1.2.3