From 602b95720caed80004ece2c35374cb97197b0ee0 Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Thu, 23 Apr 2020 18:14:52 +0300 Subject: Copy of rev.04 project as-is after Fredrik's conversion script. --- KiCAD/rev02_13.sch | 621 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 621 insertions(+) create mode 100644 KiCAD/rev02_13.sch (limited to 'KiCAD/rev02_13.sch') diff --git a/KiCAD/rev02_13.sch b/KiCAD/rev02_13.sch new file mode 100644 index 0000000..cf36ec9 --- /dev/null +++ b/KiCAD/rev02_13.sch @@ -0,0 +1,621 @@ +EESchema Schematic File Version 4 +EELAYER 26 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 15 27 +Title "rev02_13" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 1100 4300 0 60 ~ 12 +*) Configuration Interface +Text Notes 1000 8700 0 60 ~ 12 +M[2:0] == 3'b001 => Master SPI +Text Notes 700 7400 0 60 ~ 12 +*) Since VCCO is 3.3V, CFGBVS must be tied High.\n*) Battery is not used\n*) PROG_B is dedicated input -- can be driven by STM32 directly\n*) INIT_B is bi-directional open-drain, must be driven with MOSFET to ground +Text Notes 3700 9800 0 60 ~ 12 +*) "Not DONE" LED, should be of red color +Text Notes 8590 10210 0 54 ~ 12 +FPGA configuration interface +Text Notes 1600 9380 0 60 ~ 12 +R35 +Text Notes 2400 9370 0 60 ~ 12 +R36 +Text Notes 6650 5500 0 60 ~ 12 +2N7002 +Text Notes 6450 5510 0 60 ~ 12 +Q4 +Text Notes 5140 9560 2 60 ~ 12 +R39 +Text Notes 7860 8790 0 60 ~ 12 +C108 +Text Notes 7760 8990 0 60 ~ 12 +0.1~uF +Text Notes 1600 4570 0 60 ~ 12 +U13 +Text Notes 1050 6300 0 60 ~ 12 +XC7A200TFBG484 +$Comp +L power:GND GND_92 +U 1 1 58023F77 +P 2200 6300 +F 0 "GND_92" H 2200 6300 20 0000 C CNN +F 1 "+GND" H 2200 6230 30 0000 C CNN +F 2 "" H 2200 6300 70 0000 C CNN +F 3 "" H 2200 6300 70 0000 C CNN + 1 2200 6300 + 1 0 0 -1 +$EndComp +$Comp +L power:GND GND_93 +U 1 1 58023F76 +P 1500 9800 +F 0 "GND_93" H 1500 9800 20 0000 C CNN +F 1 "+GND" H 1500 9730 30 0000 C CNN +F 2 "" H 1500 9800 70 0000 C CNN +F 3 "" H 1500 9800 70 0000 C CNN + 1 1500 9800 + 1 0 0 -1 +$EndComp +$Comp +L power:GND GND_94 +U 1 1 58023F75 +P 2300 9800 +F 0 "GND_94" H 2300 9800 20 0000 C CNN +F 1 "+GND" H 2300 9730 30 0000 C CNN +F 2 "" H 2300 9800 70 0000 C CNN +F 3 "" H 2300 9800 70 0000 C CNN + 1 2300 9800 + 1 0 0 -1 +$EndComp +$Comp +L power:GND GND_95 +U 1 1 58023F74 +P 5800 6400 +F 0 "GND_95" H 5800 6400 20 0000 C CNN +F 1 "+GND" H 5800 6330 30 0000 C CNN +F 2 "" H 5800 6400 70 0000 C CNN +F 3 "" H 5800 6400 70 0000 C CNN + 1 5800 6400 + 1 0 0 -1 +$EndComp +$Comp +L power:GND GND_96 +U 1 1 58023F73 +P 6600 6400 +F 0 "GND_96" H 6600 6400 20 0000 C CNN +F 1 "+GND" H 6600 6330 30 0000 C CNN +F 2 "" H 6600 6400 70 0000 C CNN +F 3 "" H 6600 6400 70 0000 C CNN + 1 6600 6400 + 1 0 0 -1 +$EndComp +$Comp +L power:GND GND_97 +U 1 1 58023F72 +P 9100 9300 +F 0 "GND_97" H 9100 9300 20 0000 C CNN +F 1 "+GND" H 9100 9230 30 0000 C CNN +F 2 "" H 9100 9300 70 0000 C CNN +F 3 "" H 9100 9300 70 0000 C CNN + 1 9100 9300 + 1 0 0 -1 +$EndComp +$Comp +L power:GND GND_98 +U 1 1 58023F71 +P 7700 9300 +F 0 "GND_98" H 7700 9300 20 0000 C CNN +F 1 "+GND" H 7700 9230 30 0000 C CNN +F 2 "" H 7700 9300 70 0000 C CNN +F 3 "" H 7700 9300 70 0000 C CNN + 1 7700 9300 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:VCCO_3V3 VCCO_3V3_21 +U 1 1 58023F70 +P 3100 8200 +F 0 "VCCO_3V3_21" H 3100 8200 20 0000 C CNN +F 1 "+VCCO_3V3" H 3100 8130 30 0000 C CNN +F 2 "" H 3100 8200 70 0000 C CNN +F 3 "" H 3100 8200 70 0000 C CNN + 1 3100 8200 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:VCCO_3V3 VCCO_3V3_22 +U 1 1 58023F6F +P 4700 8200 +F 0 "VCCO_3V3_22" H 4700 8200 20 0000 C CNN +F 1 "+VCCO_3V3" H 4700 8130 30 0000 C CNN +F 2 "" H 4700 8200 70 0000 C CNN +F 3 "" H 4700 8200 70 0000 C CNN + 1 4700 8200 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:VCCO_3V3 VCCO_3V3_23 +U 1 1 58023F6E +P 7700 8200 +F 0 "VCCO_3V3_23" H 7700 8200 20 0000 C CNN +F 1 "+VCCO_3V3" H 7700 8130 30 0000 C CNN +F 2 "" H 7700 8200 70 0000 C CNN +F 3 "" H 7700 8200 70 0000 C CNN + 1 7700 8200 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:VCCO_3V3 VCCO_3V3_24 +U 1 1 58023F6D +P 9100 7400 +F 0 "VCCO_3V3_24" H 9100 7400 20 0000 C CNN +F 1 "+VCCO_3V3" H 9100 7330 30 0000 C CNN +F 2 "" H 9100 7400 70 0000 C CNN +F 3 "" H 9100 7400 70 0000 C CNN + 1 9100 7400 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:VCCO_3V3 VCCO_3V3_25 +U 1 1 58023F6C +P 2400 4500 +F 0 "VCCO_3V3_25" H 2400 4500 20 0000 C CNN +F 1 "+VCCO_3V3" H 2400 4430 30 0000 C CNN +F 2 "" H 2400 4500 70 0000 C CNN +F 3 "" H 2400 4500 70 0000 C CNN + 1 2400 4500 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:VCCO_3V3 VCCO_3V3_26 +U 1 1 58023F6B +P 6000 4100 +F 0 "VCCO_3V3_26" H 6000 4100 20 0000 C CNN +F 1 "+VCCO_3V3" H 6000 4030 30 0000 C CNN +F 2 "" H 6000 4100 70 0000 C CNN +F 3 "" H 6000 4100 70 0000 C CNN + 1 6000 4100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2200 4700 2200 6300 +Wire Wire Line + 2200 4700 2000 4700 +Wire Wire Line + 1500 9600 1500 9800 +Wire Wire Line + 2300 9600 2300 9800 +Wire Wire Line + 6000 5600 5800 5600 +Wire Wire Line + 5800 5600 5800 6400 +Wire Wire Line + 6600 6200 6600 6400 +Wire Wire Line + 9100 9100 9100 9300 +Wire Wire Line + 9300 9100 9100 9100 +Wire Wire Line + 9300 9000 9100 9000 +Wire Wire Line + 9100 9000 9100 9100 +Wire Wire Line + 9300 8900 9100 8900 +Wire Wire Line + 9100 8900 9100 9000 +Connection ~ 9100 9100 +Connection ~ 9100 9000 +Wire Wire Line + 7700 9000 7700 9300 +Wire Wire Line + 3100 8200 3100 8400 +Wire Wire Line + 4700 8200 4700 8500 +Wire Wire Line + 9000 7700 9000 7800 +Wire Wire Line + 9100 7700 9000 7700 +Wire Wire Line + 9200 7700 9100 7700 +Wire Wire Line + 9200 7700 9200 7800 +Wire Wire Line + 9100 7700 9100 7800 +Wire Wire Line + 9100 7400 9100 7700 +Connection ~ 9100 7700 +Wire Wire Line + 9300 8400 7700 8400 +Wire Wire Line + 7700 8200 7700 8400 +Wire Wire Line + 7700 8400 7700 8700 +Connection ~ 7700 8400 +Wire Wire Line + 6000 4300 5800 4300 +Wire Wire Line + 6200 4300 6000 4300 +Wire Wire Line + 6200 4300 6200 4500 +Wire Wire Line + 5800 4300 5800 4500 +Wire Wire Line + 6000 4100 6000 4300 +Connection ~ 6000 4300 +Wire Wire Line + 2400 4800 2000 4800 +Wire Wire Line + 2400 4900 2000 4900 +Wire Wire Line + 2400 4800 2400 4900 +Wire Wire Line + 2400 5000 2000 5000 +Wire Wire Line + 2400 4900 2400 5000 +Wire Wire Line + 2400 4500 2400 4800 +Connection ~ 2400 4800 +Connection ~ 2400 4900 +Wire Wire Line + 3400 5700 2000 5700 +Text Label 3400 5700 2 48 ~ 0 +FPGA_M2 +Wire Wire Line + 1500 9000 1500 9200 +Wire Wire Line + 1500 9000 900 9000 +Text Label 900 9000 0 48 ~ 0 +FPGA_M2 +Wire Wire Line + 3400 5800 2000 5800 +Text Label 3400 5800 2 48 ~ 0 +FPGA_JTAG_TCK +Text Label 8430 8500 0 48 ~ +FPGA_JTAG_TCK +Wire Wire Line + 3400 5900 2000 5900 +Text Label 3400 5900 2 48 ~ 0 +FPGA_JTAG_TDI +Wire Wire Line + 9000 8700 8800 8700 +Wire Wire Line + 9300 8700 9000 8700 +Wire Wire Line + 8800 8700 8430 8700 +Text Label 8430 8700 0 48 ~ +FPGA_JTAG_TDI +Wire Wire Line + 3400 6000 2000 6000 +Text Label 3400 6000 2 48 ~ 0 +FPGA_JTAG_TDO +Wire Wire Line + 9300 8800 8430 8800 +Text Label 8430 8800 0 48 ~ +FPGA_JTAG_TDO +Wire Wire Line + 3400 6100 2000 6100 +Text Label 3400 6100 2 48 ~ 0 +FPGA_JTAG_TMS +Wire Wire Line + 9100 8600 8900 8600 +Wire Wire Line + 9300 8600 9100 8600 +Wire Wire Line + 8900 8600 8430 8600 +Text Label 8430 8600 0 48 ~ +FPGA_JTAG_TMS +Wire Wire Line + 6200 4900 6200 5100 +Wire Wire Line + 7600 5100 6200 5100 +Text GLabel 7600 5100 2 48 Input ~ 0 +FPGA_PROGRAM_B +Wire Wire Line + 3940 5300 3240 5300 +Text GLabel 3940 5300 2 48 Input ~ 0 +FPGA_PROGRAM_B +Wire Wire Line + 3400 5100 2000 5100 +Text Label 3400 5100 2 48 ~ 0 +FPGA_DONE_INT +Wire Wire Line + 4700 9400 4700 9500 +Wire Wire Line + 4700 9500 3700 9500 +Wire Wire Line + 5000 9500 4700 9500 +Text Label 3700 9500 0 48 ~ +FPGA_DONE_INT +Connection ~ 4700 9500 +Wire Wire Line + 3400 5500 2000 5500 +Text Label 3400 5500 2 48 ~ 0 +FPGA_M0 +Wire Wire Line + 3100 9000 2500 9000 +Wire Wire Line + 3100 8800 3100 9000 +Text Label 2500 9000 0 48 ~ 0 +FPGA_M0 +Wire Wire Line + 3400 5600 2000 5600 +Text Label 3400 5600 2 48 ~ 0 +FPGA_M1 +Wire Wire Line + 2300 9000 1700 9000 +Wire Wire Line + 2300 9000 2300 9200 +Text Label 1700 9000 0 48 ~ 0 +FPGA_M1 +Wire Wire Line + 5800 4900 5800 5400 +Wire Wire Line + 5800 5400 4800 5400 +Wire Wire Line + 6000 5400 5800 5400 +Text Label 4800 5400 0 48 ~ +FPGA_INIT_B_INT +Connection ~ 5800 5400 +Wire Wire Line + 3940 5200 3240 5200 +Text Label 3940 5200 2 48 ~ 0 +FPGA_INIT_B_INT +Wire Wire Line + 6600 5600 6400 5600 +Wire Wire Line + 6600 5600 6600 5800 +Wire Wire Line + 7600 5600 6600 5600 +Text GLabel 7600 5600 2 48 BiDi ~ 0 +FPGA_INIT_B +Connection ~ 6600 5600 +Wire Wire Line + 4700 8900 4700 9100 +Wire Wire Line + 5700 9500 5400 9500 +Text GLabel 5700 9500 2 48 Output ~ 0 +FPGA_DONE +Wire Wire Line + 3940 5400 3240 5400 +Text GLabel 3940 5400 2 48 Output ~ 0 +FPGA_CFG_SCLK +Wire Wire Line + 2840 5200 2000 5200 +Text Label 2220 5200 0 48 ~ +FPGA_INIT_B_INT1 +Wire Wire Line + 2840 5300 2000 5300 +Text Label 2220 5300 0 48 ~ +FPGA_PROGRAM_B1 +Wire Wire Line + 2840 5400 2000 5400 +Text Label 2220 5400 0 48 ~ +FPGA_CFG_SCLK1 +Wire Wire Line + 9100 8600 9100 8200 +Wire Wire Line + 9200 8500 9200 8200 +Wire Wire Line + 9000 8700 9000 8200 +Wire Wire Line + 9200 8500 9300 8500 +Wire Wire Line + 8430 8500 9200 8500 +Connection ~ 9000 8700 +Connection ~ 9100 8600 +Connection ~ 9200 8500 +$Comp +L Cryptech_Alpha:R-EU_R0402 R35 +U 1 1 58023F6A +P 1500 9400 +F 0 "R35" V 1410 9355 60 0000 R TNN +F 1 "1k" V 1430 9310 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 1430 9310 60 0001 C CNN +F 3 "" H 1430 9310 60 0000 C CNN + 1 1500 9400 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R39 +U 1 1 58023F69 +P 5200 9500 +F 0 "R39" H 5310 9645 60 0000 R TNN +F 1 "100" H 5220 9650 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 5220 9650 60 0001 C CNN +F 3 "" H 5220 9650 60 0000 C CNN + 1 5200 9500 + -1 0 0 1 +$EndComp +$Comp +L Cryptech_Alpha:MA08-1 SV1 +U 1 1 58023F68 +P 9600 8700 +F 0 "SV1" H 9780 9330 60 0000 R TNN +F 1 "MA08-1" H 9560 9330 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:PLS-8" H 9560 9330 60 0001 C CNN +F 3 "" H 9560 9330 60 0000 C CNN + 1 9600 8700 + -1 0 0 1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0402 C108 +U 1 1 58023F67 +P 7700 8800 +F 0 "C108" H 7780 8610 60 0000 L BNN +F 1 "0.1uF" H 7860 8710 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 7860 8710 60 0001 C CNN +F 3 "" H 7860 8710 60 0000 C CNN + 1 7700 8800 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R43 +U 1 1 58023F66 +P 9000 8000 +F 0 "R43" V 9159 7650 60 0000 R TNN +F 1 "10k" V 9170 7450 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 9170 7450 60 0001 C CNN +F 3 "" H 9170 7450 60 0000 C CNN + 1 9000 8000 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R44 +U 1 1 58023F65 +P 9100 8000 +F 0 "R44" V 9159 7750 60 0000 R TNN +F 1 "10k" V 9170 7550 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 9170 7550 60 0001 C CNN +F 3 "" H 9170 7550 60 0000 C CNN + 1 9100 8000 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R45 +U 1 1 58023F64 +P 9200 8000 +F 0 "R45" V 9159 7850 60 0000 R TNN +F 1 "10k" V 9170 7650 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 9170 7650 60 0001 C CNN +F 3 "" H 9170 7650 60 0000 C CNN + 1 9200 8000 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0603 R62 +U 1 1 58023F63 +P 3040 5200 +F 0 "R62" H 3150 4890 60 0000 R TNN +F 1 "0" H 2940 4890 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 2940 4890 60 0001 C CNN +F 3 "" H 2940 4890 60 0000 C CNN + 1 3040 5200 + -1 0 0 1 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0603 R63 +U 1 1 58023F62 +P 3040 5300 +F 0 "R63" H 3150 4960 60 0000 R TNN +F 1 "0" H 2940 4950 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 2940 4950 60 0001 C CNN +F 3 "" H 2940 4950 60 0000 C CNN + 1 3040 5300 + -1 0 0 1 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0603 R71 +U 1 1 58023F61 +P 3040 5400 +F 0 "R71" H 3150 5030 60 0000 R TNN +F 1 "0" H 2940 5020 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 2940 5020 60 0001 C CNN +F 3 "" H 2940 5020 60 0000 C CNN + 1 3040 5400 + -1 0 0 1 +$EndComp +$Comp +L Cryptech_Alpha:XC7A200TFBG484_1 U13 +U 1 1 58023F60 +P 1800 5400 +F 0 "U13" H 1390 4490 60 0000 L BNN + 1 1800 5400 + 1 0 0 -1 +F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1390 4490 60 0001 C CNN +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R36 +U 1 1 58023F5F +P 2300 9400 +F 0 "R36" V 2210 9355 60 0000 R TNN +F 1 "1k" V 2240 9310 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 2240 9310 60 0001 C CNN +F 3 "" H 2240 9310 60 0000 C CNN + 1 2300 9400 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R37 +U 1 1 58023F5E +P 3100 8600 +F 0 "R37" V 3159 8450 60 0000 R TNN +F 1 "1k" V 3060 8460 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 3060 8460 60 0001 C CNN +F 3 "" H 3060 8460 60 0000 C CNN + 1 3100 8600 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R41 +U 1 1 58023F5D +P 6200 4700 +F 0 "R41" V 6271 4547 60 0000 R TNN +F 1 "4.7k" V 6190 4550 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 6190 4550 60 0001 C CNN +F 3 "" H 6190 4550 60 0000 C CNN + 1 6200 4700 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R40 +U 1 1 58023F5C +P 5800 4700 +F 0 "R40" V 5871 5047 60 0000 R TNN +F 1 "4.7k" V 5780 5050 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 5780 5050 60 0001 C CNN +F 3 "" H 5780 5050 60 0000 C CNN + 1 5800 4700 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:2N7002 Q4 +U 1 1 58023F5B +P 6200 5500 +F 0 "Q4" H 6310 5245 60 0000 R BNN +F 1 "2N7002P,235" H 6420 5655 60 0000 R BNN +F 2 "Cryptech_Alpha_Footprints:SOT-23" H 6420 5655 60 0001 C CNN +F 3 "" H 6420 5655 60 0000 C CNN + 1 6200 5500 + -1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R42 +U 1 1 58023F5A +P 6600 6000 +F 0 "R42" V 6559 5850 60 0000 R TNN +F 1 "4.7k" V 6470 5850 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 6470 5850 60 0001 C CNN +F 3 "" H 6470 5850 60 0000 C CNN + 1 6600 6000 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:LEDCHIP-LED0603 LED13 +U 1 1 58023F59 +P 4700 9200 +F 0 "LED13" H 4820 9260 60 0000 L BNN +F 1 "LTST-C191KRKT" H 4820 9075 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:VD_0603" H 4820 9075 60 0001 C CNN +F 3 "" H 4820 9075 60 0000 C CNN + 1 4700 9200 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R38 +U 1 1 58023F58 +P 4700 8700 +F 0 "R38" V 4759 8550 60 0000 R TNN +F 1 "330" V 4670 8560 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 4670 8560 60 0001 C CNN +F 3 "" H 4670 8560 60 0000 C CNN + 1 4700 8700 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC \ No newline at end of file -- cgit v1.2.3