From 4d9304dbd2f49e99e900039caeab133687c6e5cb Mon Sep 17 00:00:00 2001 From: "Pavel V. Shatov (Meister)" Date: Wed, 23 Sep 2020 16:00:05 +0300 Subject: Finished BOM overhaul. All the discrete components should have proper tolerance and other parameters. All the other components should have partnumbers and manufacturers associated. Did some polishing to the PCB after feedback from the assembly house. KiCAD was for some reason breaking the "neck" between two copper islands in a couple of places. This was happening in two places on Layer 3 and three places on Layer 6, easily fixed by hand. --- KiCAD/Cryptech Alpha-cache.lib | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'KiCAD/Cryptech Alpha-cache.lib') diff --git a/KiCAD/Cryptech Alpha-cache.lib b/KiCAD/Cryptech Alpha-cache.lib index c6ef247..d7e30e7 100644 --- a/KiCAD/Cryptech Alpha-cache.lib +++ b/KiCAD/Cryptech Alpha-cache.lib @@ -2953,6 +2953,22 @@ X VCC 5 0 400 100 D 50 50 4 1 W ENDDRAW ENDDEF # +# Mechanical_Heatsink +# +DEF Mechanical_Heatsink HS 0 40 Y Y 1 F N +F0 "HS" 0 200 50 H V C CNN +F1 "Mechanical_Heatsink" 0 -50 50 H V C CNN +F2 "" 12 0 50 H I C CNN +F3 "" 12 0 50 H I C CNN +$FPLIST + Heatsink_* +$ENDFPLIST +DRAW +P 10 0 1 10 -13 50 -38 50 -38 150 -63 150 -63 50 -88 50 -88 150 -113 150 -113 0 -38 0 f +P 13 0 1 10 -13 50 -13 150 12 150 12 50 37 50 37 150 62 150 62 50 87 50 87 150 112 150 112 0 -38 0 f +ENDDRAW +ENDDEF +# # power_GND # DEF power_GND #PWR 0 0 Y Y 1 F P -- cgit v1.2.3