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diff --git a/KiCAD/rev04_12.sch-bak b/KiCAD/rev04_12.sch-bak new file mode 100644 index 0000000..563507d --- /dev/null +++ b/KiCAD/rev04_12.sch-bak @@ -0,0 +1,1210 @@ +EESchema Schematic File Version 4 +EELAYER 30 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 13 27 +Title "rev04_12" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 780 830 0 84 ~ 17 +Master Key Memory +$Comp +L power:GND #GND_087 +U 1 1 58023F8C +P 9400 2450 +F 0 "#GND_087" H 9400 2450 20 0000 C CNN +F 1 "+GND" H 9400 2380 30 0000 C CNN +F 2 "" H 9400 2450 70 0000 C CNN +F 3 "" H 9400 2450 70 0000 C CNN + 1 9400 2450 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:3V3_BATT #3V3_BATT_010 +U 1 1 58023F89 +P 9400 1050 +F 0 "#3V3_BATT_010" H 9400 1050 20 0000 C CNN +F 1 "+3V3_BATT" H 9400 980 30 0000 C CNN +F 2 "" H 9400 1050 70 0000 C CNN +F 3 "" H 9400 1050 70 0000 C CNN + 1 9400 1050 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_088 +U 1 1 58023F88 +P 11400 2500 +F 0 "#GND_088" H 11400 2500 20 0000 C CNN +F 1 "+GND" H 11400 2430 30 0000 C CNN +F 2 "" H 11400 2500 70 0000 C CNN +F 3 "" H 11400 2500 70 0000 C CNN + 1 11400 2500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9400 1050 9400 1450 +$Comp +L FPGA_Lattice:ICE40UP5K-SG48ITR U11 +U 2 1 5EF0D127 +P 4700 2550 +F 0 "U11" H 4700 1475 50 0000 C CNN +F 1 "ICE40UP5K-SG48ITR" H 4700 1384 50 0000 C CNN +F 2 "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" H 4700 1200 50 0001 C CNN +F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 4300 3550 50 0001 C CNN + 2 4700 2550 + 1 0 0 -1 +$EndComp +$Comp +L FPGA_Lattice:ICE40UP5K-SG48ITR U11 +U 3 1 5F21B0EE +P 9400 8900 +F 0 "U11" H 9750 8800 50 0000 L CNN +F 1 "ICE40UP5K-SG48ITR" H 9750 8700 50 0000 L CNN +F 2 "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" H 9400 7550 50 0001 C CNN +F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 9000 9900 50 0001 C CNN + 3 9400 8900 + 1 0 0 -1 +$EndComp +$Comp +L FPGA_Lattice:ICE40UP5K-SG48ITR U11 +U 4 1 5F21BC58 +P 15500 1600 +F 0 "U11" H 15730 1646 50 0000 L CNN +F 1 "ICE40UP5K-SG48ITR" H 15730 1555 50 0000 L CNN +F 2 "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" H 15500 250 50 0001 C CNN +F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 15100 2600 50 0001 C CNN + 4 15500 1600 + 0 -1 -1 0 +$EndComp +$Comp +L FPGA_Lattice:ICE40UP5K-SG48ITR U11 +U 1 1 5EEFEF07 +P 4600 8300 +F 0 "U11" H 4930 8353 50 0000 L CNN +F 1 "ICE40UP5K-SG48ITR" H 4930 8262 50 0000 L CNN +F 2 "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" H 4600 6950 50 0001 C CNN +F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 4200 9300 50 0001 C CNN + 1 4600 8300 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:3V3_BATT #3V3_BATT_012 +U 1 1 58023F83 +P 4600 6850 +F 0 "#3V3_BATT_012" H 4600 6850 20 0000 C CNN +F 1 "+3V3_BATT" H 4600 6780 30 0000 C CNN +F 2 "" H 4600 6850 70 0000 C CNN +F 3 "" H 4600 6850 70 0000 C CNN + 1 4600 6850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4600 6850 4600 7100 +$Comp +L Cryptech_Alpha:ADP121-AUJZ12R7 U10 +U 1 1 5F031C66 +P 10500 1650 +F 0 "U10" H 10500 2220 50 0000 C CNN +F 1 "ADP121-AUJZ12R7" H 10500 2129 50 0000 C CNN +F 2 "SOT95P280X100-5N" H 10500 1650 50 0001 L BNN +F 3 "2074869" H 10500 1650 50 0001 L BNN +F 4 "Analog Devices" H 10500 1650 50 0001 L BNN "Field4" +F 5 "TSOT-5" H 10500 1650 50 0001 L BNN "Field5" +F 6 "10R7024" H 10500 1650 50 0001 L BNN "Field6" +F 7 "ADP121-AUJZ12R7" H 10500 1650 50 0001 L BNN "Field7" + 1 10500 1650 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0603 C? +U 1 1 5F043BA5 +P 11400 2050 +AR Path="/57D849FD/5F043BA5" Ref="C?" Part="1" +AR Path="/57D8509E/5F043BA5" Ref="C104" Part="1" +F 0 "C104" H 11100 2150 60 0000 L BNN +F 1 "1uF" H 11090 2020 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0603" H 11090 2020 60 0001 C CNN +F 3 "" H 11090 2020 60 0000 C CNN + 1 11400 2050 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0603 C? +U 1 1 5F043CFB +P 9400 1700 +AR Path="/57D849FD/5F043CFB" Ref="C?" Part="1" +AR Path="/57D8509E/5F043CFB" Ref="C102" Part="1" +F 0 "C102" H 9100 1800 60 0000 L BNN +F 1 "1uF" H 9090 1670 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0603" H 9090 1670 60 0001 C CNN +F 3 "" H 9090 1670 60 0000 C CNN + 1 9400 1700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9400 1900 9400 2050 +Wire Wire Line + 9800 2050 9400 2050 +Connection ~ 9400 2050 +Wire Wire Line + 9400 2050 9400 2450 +Wire Wire Line + 9800 1450 9700 1450 +Wire Wire Line + 9400 1450 9400 1600 +Wire Wire Line + 9800 1650 9700 1650 +Wire Wire Line + 9700 1650 9700 1450 +Connection ~ 9700 1450 +Wire Wire Line + 9700 1450 9400 1450 +Wire Wire Line + 11200 1450 11400 1450 +Connection ~ 9400 1450 +$Comp +L Cryptech_Alpha:R-EU_R0402 R? +U 1 1 5F057AAC +P 11900 1450 +AR Path="/57D84708/5F057AAC" Ref="R?" Part="1" +AR Path="/57D8509E/5F057AAC" Ref="R24" Part="1" +F 0 "R24" H 11850 1550 60 0000 L BNN +F 1 "100" H 11800 1300 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 11900 1500 60 0001 C CNN +F 3 "" H 11900 1500 60 0000 C CNN + 1 11900 1450 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0805 C? +U 1 1 5F05B071 +P 12200 2050 +AR Path="/57D849FD/5F05B071" Ref="C?" Part="1" +AR Path="/57D8509E/5F05B071" Ref="C107" Part="1" +F 0 "C107" H 11810 2030 60 0000 L BNN +F 1 "10uF" H 11800 1930 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0805" H 11800 1930 60 0001 C CNN +F 3 "" H 11800 1930 60 0000 C CNN + 1 12200 2050 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0402 C? +U 1 1 5F05C031 +P 12400 2050 +AR Path="/57D849FD/5F05C031" Ref="C?" Part="1" +AR Path="/57D8509E/5F05C031" Ref="C216" Part="1" +F 0 "C216" H 12250 2240 60 0000 L BNN +F 1 "0.1uF" H 12240 2160 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 12240 2160 60 0001 C CNN +F 3 "" H 12240 2160 60 0000 C CNN + 1 12400 2050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 12100 1450 12200 1450 +Connection ~ 12200 1450 +Wire Wire Line + 12200 1450 12400 1450 +$Comp +L power:GND #GND_0229 +U 1 1 5F065A1F +P 12200 2500 +F 0 "#GND_0229" H 12200 2500 20 0000 C CNN +F 1 "+GND" H 12200 2430 30 0000 C CNN +F 2 "" H 12200 2500 70 0000 C CNN +F 3 "" H 12200 2500 70 0000 C CNN + 1 12200 2500 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0230 +U 1 1 5F065C60 +P 12400 2500 +F 0 "#GND_0230" H 12400 2500 20 0000 C CNN +F 1 "+GND" H 12400 2430 30 0000 C CNN +F 2 "" H 12400 2500 70 0000 C CNN +F 3 "" H 12400 2500 70 0000 C CNN + 1 12400 2500 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0231 +U 1 1 5F066E2E +P 16000 2550 +F 0 "#GND_0231" H 16000 2550 20 0000 C CNN +F 1 "+GND" H 16000 2480 30 0000 C CNN +F 2 "" H 16000 2550 70 0000 C CNN +F 3 "" H 16000 2550 70 0000 C CNN + 1 16000 2550 + 1 0 0 -1 +$EndComp +Wire Wire Line + 15900 1600 16000 1600 +Wire Wire Line + 16000 1600 16000 2550 +Wire Wire Line + 12200 1450 12200 1950 +Wire Wire Line + 12400 1450 12400 1950 +Wire Wire Line + 11400 2250 11400 2500 +Wire Wire Line + 12200 2250 12200 2500 +Wire Wire Line + 12400 2250 12400 2500 +$Comp +L Cryptech_Alpha:C-EUC0402 C? +U 1 1 5F077BE8 +P 13700 2000 +AR Path="/57D849FD/5F077BE8" Ref="C?" Part="1" +AR Path="/57D8509E/5F077BE8" Ref="C217" Part="1" +F 0 "C217" V 13800 2050 60 0000 L BNN +F 1 "0.1uF" V 13800 1650 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 13540 2110 60 0001 C CNN +F 3 "" H 13540 2110 60 0000 C CNN + 1 13700 2000 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0402 C218 +U 1 1 5F0798C6 +P 14300 2100 +F 0 "C218" V 14200 1950 60 0000 R TNN +F 1 "0.01uF" V 14200 2400 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 14200 2200 60 0001 C CNN +F 3 "" H 14200 2200 60 0000 C CNN + 1 14300 2100 + -1 0 0 1 +$EndComp +$Comp +L power:GND #GND_0232 +U 1 1 5F079CE0 +P 14100 2450 +F 0 "#GND_0232" H 14100 2450 20 0000 C CNN +F 1 "+GND" H 14100 2380 30 0000 C CNN +F 2 "" H 14100 2450 70 0000 C CNN +F 3 "" H 14100 2450 70 0000 C CNN + 1 14100 2450 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0233 +U 1 1 5F079E0D +P 14300 2450 +F 0 "#GND_0233" H 14300 2450 20 0000 C CNN +F 1 "+GND" H 14300 2380 30 0000 C CNN +F 2 "" H 14300 2450 70 0000 C CNN +F 3 "" H 14300 2450 70 0000 C CNN + 1 14300 2450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 14100 2200 14100 2450 +Wire Wire Line + 14300 2200 14300 2450 +Wire Wire Line + 14300 1600 14300 1900 +Wire Wire Line + 14100 1900 14100 1600 +Wire Wire Line + 14100 1600 14300 1600 +Wire Wire Line + 11400 1450 11400 1950 +Text Label 11250 1450 0 50 ~ 0 +MKM_VCC +$Comp +L power:GND #GND_0234 +U 1 1 5F090433 +P 9400 4200 +F 0 "#GND_0234" H 9400 4200 20 0000 C CNN +F 1 "+GND" H 9400 4130 30 0000 C CNN +F 2 "" H 9400 4200 70 0000 C CNN +F 3 "" H 9400 4200 70 0000 C CNN + 1 9400 4200 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:3V3_BATT #3V3_BATT_0101 +U 1 1 5F09043D +P 9400 2800 +F 0 "#3V3_BATT_0101" H 9400 2800 20 0000 C CNN +F 1 "+3V3_BATT" H 9400 2730 30 0000 C CNN +F 2 "" H 9400 2800 70 0000 C CNN +F 3 "" H 9400 2800 70 0000 C CNN + 1 9400 2800 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0235 +U 1 1 5F090447 +P 11400 4250 +F 0 "#GND_0235" H 11400 4250 20 0000 C CNN +F 1 "+GND" H 11400 4180 30 0000 C CNN +F 2 "" H 11400 4250 70 0000 C CNN +F 3 "" H 11400 4250 70 0000 C CNN + 1 11400 4250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9400 2800 9400 3200 +$Comp +L Cryptech_Alpha:C-EUC0603 C? +U 1 1 5F090460 +P 11400 3800 +AR Path="/57D849FD/5F090460" Ref="C?" Part="1" +AR Path="/57D8509E/5F090460" Ref="C106" Part="1" +F 0 "C106" H 11100 3900 60 0000 L BNN +F 1 "1uF" H 11090 3770 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0603" H 11090 3770 60 0001 C CNN +F 3 "" H 11090 3770 60 0000 C CNN + 1 11400 3800 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0603 C? +U 1 1 5F09046A +P 9400 3450 +AR Path="/57D849FD/5F09046A" Ref="C?" Part="1" +AR Path="/57D8509E/5F09046A" Ref="C103" Part="1" +F 0 "C103" H 9100 3550 60 0000 L BNN +F 1 "1uF" H 9090 3420 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0603" H 9090 3420 60 0001 C CNN +F 3 "" H 9090 3420 60 0000 C CNN + 1 9400 3450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9400 3650 9400 3800 +Wire Wire Line + 9800 3800 9400 3800 +Connection ~ 9400 3800 +Wire Wire Line + 9400 3800 9400 4200 +Wire Wire Line + 9800 3200 9700 3200 +Wire Wire Line + 9400 3200 9400 3350 +Wire Wire Line + 9800 3400 9700 3400 +Wire Wire Line + 9700 3400 9700 3200 +Connection ~ 9700 3200 +Wire Wire Line + 9700 3200 9400 3200 +Wire Wire Line + 11200 3200 11400 3200 +Connection ~ 9400 3200 +Wire Wire Line + 11400 4000 11400 4250 +Wire Wire Line + 11400 3200 11400 3700 +Text Label 11250 3200 0 50 ~ 0 +MKM_VPP +$Comp +L Cryptech_Alpha:ADP121-AUJZ25R7 U12 +U 1 1 5F0932AD +P 10500 3400 +F 0 "U12" H 10500 3970 50 0000 C CNN +F 1 "ADP121-AUJZ25R7" H 10500 3879 50 0000 C CNN +F 2 "SOT95P280X100-5N" H 10500 3400 50 0001 L BNN +F 3 "2074869" H 10500 3400 50 0001 L BNN +F 4 "Analog Devices" H 10500 3400 50 0001 L BNN "Field4" +F 5 "TSOT-5" H 10500 3400 50 0001 L BNN "Field5" +F 6 "10R7024" H 10500 3400 50 0001 L BNN "Field6" +F 7 "ADP121-AUJZ25R7" H 10500 3400 50 0001 L BNN "Field7" + 1 10500 3400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 11700 1450 11400 1450 +Connection ~ 11400 1450 +Text Label 12150 1450 0 50 ~ 0 +MKM_VCC_PLL +Wire Wire Line + 15100 1700 14500 1700 +Text Label 14550 1700 0 50 ~ 0 +MKM_VPP +Wire Wire Line + 15100 1500 14500 1500 +Text Label 14550 1500 0 50 ~ 0 +MKM_VCC_PLL +Wire Wire Line + 15100 1600 14300 1600 +Connection ~ 14300 1600 +Text Label 14550 1600 0 50 ~ 0 +MKM_VCC +Text Notes 9950 850 0 84 ~ 17 +MKM Supplies (1.2V core, 2.5V NCVM programming) +Text Notes 10050 2600 0 42 ~ 8 +Place two pairs of caps\nclose to their corresponding\nlinear voltage regulators +Text Notes 12600 2150 0 42 ~ 8 +Place this RC filter\nclose to MKM chip +Text Notes 14600 2000 0 42 ~ 8 +Place this pair of caps\nclose to MKM chip +$Comp +L Cryptech_Alpha:3V3_BATT #3V3_BATT_0102 +U 1 1 5F0F878C +P 4700 1250 +F 0 "#3V3_BATT_0102" H 4700 1250 20 0000 C CNN +F 1 "+3V3_BATT" H 4700 1180 30 0000 C CNN +F 2 "" H 4700 1250 70 0000 C CNN +F 3 "" H 4700 1250 70 0000 C CNN + 1 4700 1250 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:3V3_BATT #3V3_BATT_0103 +U 1 1 5F0FB6ED +P 9400 8000 +F 0 "#3V3_BATT_0103" H 9400 8000 20 0000 C CNN +F 1 "+3V3_BATT" H 9400 7930 30 0000 C CNN +F 2 "" H 9400 8000 70 0000 C CNN +F 3 "" H 9400 8000 70 0000 C CNN + 1 9400 8000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9400 8000 9400 8100 +$Comp +L Cryptech_Alpha:C-EUC0402 C220 +U 1 1 5F11DC09 +P 14100 2100 +F 0 "C220" V 14000 1950 60 0000 R TNN +F 1 "0.01uF" V 14000 2400 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 14000 2200 60 0001 C CNN +F 3 "" H 14000 2200 60 0000 C CNN + 1 14100 2100 + -1 0 0 1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0402 C? +U 1 1 5F11E1B4 +P 13900 2000 +AR Path="/57D849FD/5F11E1B4" Ref="C?" Part="1" +AR Path="/57D8509E/5F11E1B4" Ref="C219" Part="1" +F 0 "C219" V 14000 2050 60 0000 L BNN +F 1 "0.1uF" V 14000 1650 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 13740 2110 60 0001 C CNN +F 3 "" H 13740 2110 60 0000 C CNN + 1 13900 2000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 13900 1900 13900 1600 +Wire Wire Line + 13900 1600 14100 1600 +Connection ~ 14100 1600 +Wire Wire Line + 13700 1900 13700 1600 +Wire Wire Line + 13700 1600 13900 1600 +Connection ~ 13900 1600 +$Comp +L power:GND #GND_090 +U 1 1 5F12027B +P 13900 2450 +F 0 "#GND_090" H 13900 2450 20 0000 C CNN +F 1 "+GND" H 13900 2380 30 0000 C CNN +F 2 "" H 13900 2450 70 0000 C CNN +F 3 "" H 13900 2450 70 0000 C CNN + 1 13900 2450 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_01 +U 1 1 5F120391 +P 13700 2450 +F 0 "#GND_01" H 13700 2450 20 0000 C CNN +F 1 "+GND" H 13700 2380 30 0000 C CNN +F 2 "" H 13700 2450 70 0000 C CNN +F 3 "" H 13700 2450 70 0000 C CNN + 1 13700 2450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 13700 2200 13700 2450 +Wire Wire Line + 13900 2450 13900 2200 +$Comp +L Cryptech_Alpha:C-EUC0402 C? +U 1 1 5F13FBA7 +P 5400 7300 +AR Path="/57D849FD/5F13FBA7" Ref="C?" Part="1" +AR Path="/57D8509E/5F13FBA7" Ref="C223" Part="1" +F 0 "C223" V 5500 7350 60 0000 L BNN +F 1 "0.1uF" V 5500 6950 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 5240 7410 60 0001 C CNN +F 3 "" H 5240 7410 60 0000 C CNN + 1 5400 7300 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_091 +U 1 1 5F143DBE +P 5200 7700 +F 0 "#GND_091" H 5200 7700 20 0000 C CNN +F 1 "+GND" H 5200 7630 30 0000 C CNN +F 2 "" H 5200 7700 70 0000 C CNN +F 3 "" H 5200 7700 70 0000 C CNN + 1 5200 7700 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0237 +U 1 1 5F1442E3 +P 5400 7700 +F 0 "#GND_0237" H 5400 7700 20 0000 C CNN +F 1 "+GND" H 5400 7630 30 0000 C CNN +F 2 "" H 5400 7700 70 0000 C CNN +F 3 "" H 5400 7700 70 0000 C CNN + 1 5400 7700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5400 7700 5400 7500 +Wire Wire Line + 5200 7500 5200 7700 +Wire Wire Line + 5200 7200 5200 7100 +Wire Wire Line + 5200 7100 4600 7100 +Connection ~ 4600 7100 +Wire Wire Line + 4600 7100 4600 7200 +Wire Wire Line + 5400 7200 5400 7100 +Wire Wire Line + 5400 7100 5200 7100 +Connection ~ 5200 7100 +$Comp +L Cryptech_Alpha:C-EUC0402 C? +U 1 1 5F14E9EA +P 10200 8300 +AR Path="/57D849FD/5F14E9EA" Ref="C?" Part="1" +AR Path="/57D8509E/5F14E9EA" Ref="C226" Part="1" +F 0 "C226" V 10300 8350 60 0000 L BNN +F 1 "0.1uF" V 10300 7950 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 10040 8410 60 0001 C CNN +F 3 "" H 10040 8410 60 0000 C CNN + 1 10200 8300 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0239 +U 1 1 5F14E9F4 +P 10000 8700 +F 0 "#GND_0239" H 10000 8700 20 0000 C CNN +F 1 "+GND" H 10000 8630 30 0000 C CNN +F 2 "" H 10000 8700 70 0000 C CNN +F 3 "" H 10000 8700 70 0000 C CNN + 1 10000 8700 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0240 +U 1 1 5F14E9FE +P 10200 8700 +F 0 "#GND_0240" H 10200 8700 20 0000 C CNN +F 1 "+GND" H 10200 8630 30 0000 C CNN +F 2 "" H 10200 8700 70 0000 C CNN +F 3 "" H 10200 8700 70 0000 C CNN + 1 10200 8700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 10200 8700 10200 8500 +Wire Wire Line + 10000 8500 10000 8700 +Wire Wire Line + 10000 8200 10000 8100 +Wire Wire Line + 10000 8100 9400 8100 +Wire Wire Line + 10200 8200 10200 8100 +Wire Wire Line + 10200 8100 10000 8100 +Connection ~ 10000 8100 +Connection ~ 9400 8100 +Wire Wire Line + 9400 8100 9400 8200 +$Comp +L Cryptech_Alpha:C-EUC0402 C221 +U 1 1 5F153C00 +P 5200 7400 +F 0 "C221" V 5100 7250 60 0000 R TNN +F 1 "0.01uF" V 5100 7700 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 5100 7500 60 0001 C CNN +F 3 "" H 5100 7500 60 0000 C CNN + 1 5200 7400 + -1 0 0 1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0402 C225 +U 1 1 5F154973 +P 10000 8400 +F 0 "C225" V 9900 8250 60 0000 R TNN +F 1 "0.01uF" V 9900 8700 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 9900 8500 60 0001 C CNN +F 3 "" H 9900 8500 60 0000 C CNN + 1 10000 8400 + -1 0 0 1 +$EndComp +Text Label 3500 3150 0 50 ~ 0 +ICE40_SPI_SO +Text Label 3500 3250 0 50 ~ 0 +ICE40_SPI_SI +Text Label 3500 3350 0 50 ~ 0 +ICE40_SPI_SCK +Text Label 3500 3450 0 50 ~ 0 +ICE40_SPI_SS +$Comp +L Connector_Generic:Conn_01x08 J5 +U 1 1 5F109687 +P 14200 5050 +F 0 "J5" H 14280 5042 50 0000 L CNN +F 1 "Conn_01x08" H 14280 4951 50 0000 L CNN +F 2 "Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical" H 14200 5050 50 0001 C CNN +F 3 "~" H 14200 5050 50 0001 C CNN + 1 14200 5050 + 1 0 0 -1 +$EndComp +Text GLabel 2100 3450 0 50 Input ~ 0 +ARM_SPI3_CS_N +$Comp +L Device:R R25 +U 1 1 5F0C809C +P 3150 3150 +F 0 "R25" V 3550 3050 50 0000 C CNN +F 1 "100" V 3550 3250 50 0000 C CNN +F 2 "Resistor_SMD:R_0805_2012Metric" V 3080 3150 50 0001 C CNN +F 3 "~" H 3150 3150 50 0001 C CNN + 1 3150 3150 + 0 1 1 0 +$EndComp +$Comp +L Device:R R28 +U 1 1 5F0CAE7D +P 3150 3250 +F 0 "R28" V 3550 3150 50 0000 C CNN +F 1 "100" V 3550 3350 50 0000 C CNN +F 2 "Resistor_SMD:R_0805_2012Metric" V 3080 3250 50 0001 C CNN +F 3 "~" H 3150 3250 50 0001 C CNN + 1 3150 3250 + 0 1 1 0 +$EndComp +$Comp +L Device:R R29 +U 1 1 5F0CB078 +P 3150 3350 +F 0 "R29" V 3550 3250 50 0000 C CNN +F 1 "100" V 3550 3450 50 0000 C CNN +F 2 "Resistor_SMD:R_0805_2012Metric" V 3080 3350 50 0001 C CNN +F 3 "~" H 3150 3350 50 0001 C CNN + 1 3150 3350 + 0 1 1 0 +$EndComp +$Comp +L Device:R R30 +U 1 1 5F0CB134 +P 3150 3450 +F 0 "R30" V 3550 3350 50 0000 C CNN +F 1 "100" V 3550 3550 50 0000 C CNN +F 2 "Resistor_SMD:R_0805_2012Metric" V 3080 3450 50 0001 C CNN +F 3 "~" H 3150 3450 50 0001 C CNN + 1 3150 3450 + 0 1 1 0 +$EndComp +Wire Wire Line + 3300 3150 4200 3150 +Wire Wire Line + 3300 3250 4200 3250 +Wire Wire Line + 3300 3350 4200 3350 +Wire Wire Line + 3300 3450 4200 3450 +Wire Wire Line + 2100 3150 3000 3150 +Wire Wire Line + 2100 3250 3000 3250 +Wire Wire Line + 2100 3350 3000 3350 +Wire Wire Line + 2100 3450 3000 3450 +Text GLabel 2100 3350 0 50 Input ~ 0 +ARM_SPI3_SCK +Text GLabel 2100 3250 0 50 Input ~ 0 +ARM_SPI3_MOSI +Text GLabel 2100 3150 0 50 Output ~ 0 +ARM_SPI3_MISO +Text Notes 13000 4050 0 84 ~ 17 +Programming Header\n(pinout according to FPGA-UG-02042-26.4\n"Programming Cables User Guide") +$Comp +L Cryptech_Alpha:3V3_BATT #3V3_BATT_0104 +U 1 1 5F0EF584 +P 13900 4550 +F 0 "#3V3_BATT_0104" H 13900 4550 20 0000 C CNN +F 1 "+3V3_BATT" H 13900 4480 30 0000 C CNN +F 2 "" H 13900 4550 70 0000 C CNN +F 3 "" H 13900 4550 70 0000 C CNN + 1 13900 4550 + 1 0 0 -1 +$EndComp +Wire Wire Line + 13900 4550 13900 4750 +Wire Wire Line + 13900 4750 14000 4750 +$Comp +L power:GND #GND_0241 +U 1 1 5F0F2E04 +P 13900 6400 +F 0 "#GND_0241" H 13900 6400 20 0000 C CNN +F 1 "+GND" H 13900 6330 30 0000 C CNN +F 2 "" H 13900 6400 70 0000 C CNN +F 3 "" H 13900 6400 70 0000 C CNN + 1 13900 6400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 14000 5350 13900 5350 +Wire Wire Line + 14000 4850 13200 4850 +Text Label 13300 4850 0 50 ~ 0 +ICE40_SPI_SO +Wire Wire Line + 14000 4950 13200 4950 +Text Label 13300 4950 0 50 ~ 0 +ICE40_SPI_SI +Wire Wire Line + 13200 5050 14000 5050 +Wire Wire Line + 14000 5150 13200 5150 +Text Label 13300 5050 0 50 ~ 0 +ICE40_SPI_SS +Text Label 13300 5150 0 50 ~ 0 +ICE40_CRESET +Wire Wire Line + 14000 5250 13200 5250 +Text Label 13300 5250 0 50 ~ 0 +ICE40_CDONE +Wire Wire Line + 14000 5450 13600 5450 +Text Label 13300 5450 0 50 ~ 0 +ICE40_SPI_SCK +$Comp +L Cryptech_Alpha:C-EUC0402 C? +U 1 1 5F112F44 +P 15150 5050 +AR Path="/57D849FD/5F112F44" Ref="C?" Part="1" +AR Path="/57D8509E/5F112F44" Ref="C228" Part="1" +F 0 "C228" V 15250 5100 60 0000 L BNN +F 1 "0.1uF" V 15250 4700 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 14990 5160 60 0001 C CNN +F 3 "" H 14990 5160 60 0000 C CNN + 1 15150 5050 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0402 C227 +U 1 1 5F112F4E +P 14950 5150 +F 0 "C227" V 14850 5000 60 0000 R TNN +F 1 "0.01uF" V 14850 5450 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 14850 5250 60 0001 C CNN +F 3 "" H 14850 5250 60 0000 C CNN + 1 14950 5150 + -1 0 0 1 +$EndComp +Wire Wire Line + 5200 1850 6000 1850 +Text Label 5300 1850 0 50 ~ 0 +ICE40_CDONE +Wire Wire Line + 14950 4950 14950 4750 +Wire Wire Line + 15150 4950 15150 4750 +Wire Wire Line + 15150 4750 14950 4750 +Connection ~ 14950 4750 +Wire Wire Line + 14950 4750 14950 4550 +$Comp +L Cryptech_Alpha:3V3_BATT #3V3_BATT_0105 +U 1 1 5F145EEE +P 14950 4550 +F 0 "#3V3_BATT_0105" H 14950 4550 20 0000 C CNN +F 1 "+3V3_BATT" H 14950 4480 30 0000 C CNN +F 2 "" H 14950 4550 70 0000 C CNN +F 3 "" H 14950 4550 70 0000 C CNN + 1 14950 4550 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0242 +U 1 1 5F1460D0 +P 14950 5650 +F 0 "#GND_0242" H 14950 5650 20 0000 C CNN +F 1 "+GND" H 14950 5580 30 0000 C CNN +F 2 "" H 14950 5650 70 0000 C CNN +F 3 "" H 14950 5650 70 0000 C CNN + 1 14950 5650 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0243 +U 1 1 5F146406 +P 15150 5650 +F 0 "#GND_0243" H 15150 5650 20 0000 C CNN +F 1 "+GND" H 15150 5580 30 0000 C CNN +F 2 "" H 15150 5650 70 0000 C CNN +F 3 "" H 15150 5650 70 0000 C CNN + 1 15150 5650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 14950 5250 14950 5650 +Wire Wire Line + 15150 5250 15150 5650 +$Comp +L Cryptech_Alpha:R-EU_R0402 R? +U 1 1 5F1532CF +P 13600 5850 +AR Path="/57D84C13/5F1532CF" Ref="R?" Part="1" +AR Path="/57D8509E/5F1532CF" Ref="R33" Part="1" +F 0 "R33" V 13540 5530 60 0000 L BNN +F 1 "4.7k" V 13650 5530 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 13650 5530 60 0001 C CNN +F 3 "" H 13650 5530 60 0000 C CNN + 1 13600 5850 + 0 1 1 0 +$EndComp +$Comp +L power:GND #GND_0244 +U 1 1 5F1576E8 +P 13600 6400 +F 0 "#GND_0244" H 13600 6400 20 0000 C CNN +F 1 "+GND" H 13600 6330 30 0000 C CNN +F 2 "" H 13600 6400 70 0000 C CNN +F 3 "" H 13600 6400 70 0000 C CNN + 1 13600 6400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 13600 6400 13600 6050 +Wire Wire Line + 13600 5650 13600 5450 +Connection ~ 13600 5450 +Wire Wire Line + 13600 5450 13200 5450 +Wire Wire Line + 13900 5350 13900 6400 +$Comp +L Cryptech_Alpha:LEDCHIP-LED0603 LED? +U 1 1 5F17C1AC +P 15300 7950 +AR Path="/57D85B19/5F17C1AC" Ref="LED?" Part="1" +AR Path="/57D8509E/5F17C1AC" Ref="LED5" Part="1" +F 0 "LED5" H 15155 7860 60 0000 R BNN +F 1 "LTST-C191KGKT" H 15155 7760 60 0000 R BNN +F 2 "Cryptech_Alpha_Footprints:VD_0603" H 15155 7760 60 0001 C CNN +F 3 "" H 15155 7760 60 0000 C CNN + 1 15300 7950 + -1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:R-EU_R0402 R? +U 1 1 5F17FA51 +P 15300 7450 +AR Path="/57D84C13/5F17FA51" Ref="R?" Part="1" +AR Path="/57D8509E/5F17FA51" Ref="R48" Part="1" +F 0 "R48" V 15240 7130 60 0000 L BNN +F 1 "4.7k" V 15350 7130 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 15350 7130 60 0001 C CNN +F 3 "" H 15350 7130 60 0000 C CNN + 1 15300 7450 + 0 1 1 0 +$EndComp +$Comp +L Cryptech_Alpha:3V3_BATT #3V3_BATT_0106 +U 1 1 5F17FFB4 +P 15300 7050 +F 0 "#3V3_BATT_0106" H 15300 7050 20 0000 C CNN +F 1 "+3V3_BATT" H 15300 6980 30 0000 C CNN +F 2 "" H 15300 7050 70 0000 C CNN +F 3 "" H 15300 7050 70 0000 C CNN + 1 15300 7050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 15300 7050 15300 7250 +Wire Wire Line + 15300 7650 15300 7750 +$Comp +L power:GND #GND_0245 +U 1 1 5F1879CF +P 15300 8400 +F 0 "#GND_0245" H 15300 8400 20 0000 C CNN +F 1 "+GND" H 15300 8330 30 0000 C CNN +F 2 "" H 15300 8400 70 0000 C CNN +F 3 "" H 15300 8400 70 0000 C CNN + 1 15300 8400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 15300 8150 15300 8400 +Wire Wire Line + 15300 7750 14500 7750 +Connection ~ 15300 7750 +Wire Wire Line + 15300 7750 15300 7850 +Text Label 14600 7750 0 50 ~ 0 +ICE40_CDONE +$Comp +L Cryptech_Alpha:R-EU_R0402 R? +U 1 1 5F1B0182 +P 13800 7450 +AR Path="/57D84FAD/5F1B0182" Ref="R?" Part="1" +AR Path="/57D8509E/5F1B0182" Ref="R34" Part="1" +F 0 "R34" V 13771 7797 60 0000 R TNN +F 1 "10k" V 13660 7800 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:R_0402" H 13660 7800 60 0001 C CNN +F 3 "" H 13660 7800 60 0000 C CNN + 1 13800 7450 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:3V3_BATT #3V3_BATT_0107 +U 1 1 5F1B496A +P 13800 7050 +F 0 "#3V3_BATT_0107" H 13800 7050 20 0000 C CNN +F 1 "+3V3_BATT" H 13800 6980 30 0000 C CNN +F 2 "" H 13800 7050 70 0000 C CNN +F 3 "" H 13800 7050 70 0000 C CNN + 1 13800 7050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 13800 7050 13800 7250 +Wire Wire Line + 13800 7650 13800 7750 +Wire Wire Line + 13800 7750 13000 7750 +Text Label 13100 7750 0 50 ~ 0 +ICE40_CRESET +Text Label 8300 8900 0 50 ~ 0 +ICE40_PANIC +Text Notes 1600 4450 0 50 ~ 0 +iCE40 *_G pins are "global" I/Os (can be used\nas chip-wide reset, clock, etc). Panic button is\ndefinitely the first candidate for such pins. +Connection ~ 7000 1350 +Wire Wire Line + 7000 1350 7200 1350 +$Comp +L Cryptech_Alpha:C-EUC0402 C222 +U 1 1 5F15426E +P 7000 1650 +F 0 "C222" V 6900 1500 60 0000 R TNN +F 1 "0.01uF" V 6900 1950 60 0000 R TNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 6900 1750 60 0001 C CNN +F 3 "" H 6900 1750 60 0000 C CNN + 1 7000 1650 + -1 0 0 1 +$EndComp +Wire Wire Line + 7200 1450 7200 1350 +Wire Wire Line + 7000 1450 7000 1350 +Wire Wire Line + 7000 1750 7000 1950 +Wire Wire Line + 7200 1950 7200 1750 +$Comp +L power:GND #GND_0238 +U 1 1 5F149FCC +P 7200 1950 +F 0 "#GND_0238" H 7200 1950 20 0000 C CNN +F 1 "+GND" H 7200 1880 30 0000 C CNN +F 2 "" H 7200 1950 70 0000 C CNN +F 3 "" H 7200 1950 70 0000 C CNN + 1 7200 1950 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #GND_0236 +U 1 1 5F149FC2 +P 7000 1950 +F 0 "#GND_0236" H 7000 1950 20 0000 C CNN +F 1 "+GND" H 7000 1880 30 0000 C CNN +F 2 "" H 7000 1950 70 0000 C CNN +F 3 "" H 7000 1950 70 0000 C CNN + 1 7000 1950 + 1 0 0 -1 +$EndComp +$Comp +L Cryptech_Alpha:C-EUC0402 C? +U 1 1 5F149FB8 +P 7200 1550 +AR Path="/57D849FD/5F149FB8" Ref="C?" Part="1" +AR Path="/57D8509E/5F149FB8" Ref="C224" Part="1" +F 0 "C224" V 7300 1600 60 0000 L BNN +F 1 "0.1uF" V 7300 1200 60 0000 L BNN +F 2 "Cryptech_Alpha_Footprints:C_0402" H 7040 1660 60 0001 C CNN +F 3 "" H 7040 1660 60 0000 C CNN + 1 7200 1550 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4700 1250 4700 1350 +Wire Wire Line + 4700 1350 7000 1350 +Connection ~ 4700 1350 +Wire Wire Line + 4700 1350 4700 1450 +Text GLabel 6000 1850 2 50 Output ~ 0 +ICE40_CDONE +Wire Wire Line + 9000 8700 8200 8700 +Wire Wire Line + 9000 8800 8200 8800 +Wire Wire Line + 9000 9000 8200 9000 +Wire Wire Line + 9000 9100 8200 9100 +Wire Wire Line + 9000 8900 8200 8900 +Text GLabel 3300 1850 0 50 Input ~ 0 +ICE40_CRESET +Text Label 3400 1850 0 50 ~ 0 +ICE40_CRESET +Wire Wire Line + 4200 1850 3300 1850 +Text Label 8300 8700 0 50 ~ 0 +ICE40_LED4 +Text Label 8300 8800 0 50 ~ 0 +ICE40_LED3 +Text Label 8300 9000 0 50 ~ 0 +ICE40_LED2 +Text Label 8300 9100 0 50 ~ 0 +ICE40_LED1 +Text GLabel 8200 8700 0 50 Input ~ 0 +ICE40_LED4 +Text GLabel 8200 8800 0 50 Input ~ 0 +ICE40_LED3 +Text GLabel 8200 8900 0 50 Input ~ 0 +ICE40_PANIC +Text GLabel 8200 9000 0 50 Input ~ 0 +ICE40_LED2 +Text GLabel 8200 9100 0 50 Input ~ 0 +ICE40_LED1 +Wire Wire Line + 3400 8800 4200 8800 +Text GLabel 3400 8800 0 50 BiDi ~ 0 +ICE40_GPIO_0 +Wire Wire Line + 4200 9000 3400 9000 +Wire Wire Line + 4200 9300 3400 9300 +Wire Wire Line + 4200 9200 3400 9200 +Wire Wire Line + 4200 9100 3400 9100 +Wire Wire Line + 4200 8900 3400 8900 +Wire Wire Line + 4200 8500 3400 8500 +Wire Wire Line + 4200 8700 3400 8700 +Text GLabel 3400 9000 0 50 BiDi ~ 0 +ICE40_GPIO_1 +Text GLabel 3400 9300 0 50 BiDi ~ 0 +ICE40_GPIO_2 +Text GLabel 3400 9200 0 50 BiDi ~ 0 +ICE40_GPIO_7 +Text GLabel 3400 9100 0 50 BiDi ~ 0 +ICE40_GPIO_6 +Text GLabel 3400 8900 0 50 BiDi ~ 0 +ICE40_GPIO_5 +Text GLabel 3400 8500 0 50 BiDi ~ 0 +ICE40_GPIO_4 +Text GLabel 3400 8700 0 50 BiDi ~ 0 +ICE40_GPIO_3 +Wire Wire Line + 4200 7700 3400 7700 +Wire Wire Line + 4200 7800 3400 7800 +Wire Wire Line + 4200 7900 3400 7900 +Wire Wire Line + 4200 8000 3400 8000 +Text GLabel 3400 7700 0 50 Input ~ 0 +ICE40_FPGA_CS_N +Text GLabel 3400 7800 0 50 Input ~ 0 +ICE40_FPGA_SCK +Text GLabel 3400 7900 0 50 Input ~ 0 +ICE40_FPGA_MOSI +Text GLabel 3400 8000 0 50 Output ~ 0 +ICE40_FPGA_MISO +Wire Wire Line + 4200 3050 3400 3050 +Wire Wire Line + 4200 2950 3400 2950 +Wire Wire Line + 4200 2850 3400 2850 +Wire Wire Line + 4200 2650 3400 2650 +Text GLabel 3400 2650 0 50 BiDi ~ 0 +ICE40_GPIO_FPGA_0 +Text GLabel 3400 2850 0 50 BiDi ~ 0 +ICE40_GPIO_FPGA_1 +Text GLabel 3400 2950 0 50 BiDi ~ 0 +ICE40_GPIO_FPGA_2 +Text GLabel 3400 3050 0 50 BiDi ~ 0 +ICE40_GPIO_FPGA_3 +Wire Wire Line + 4200 2550 3400 2550 +Wire Wire Line + 4200 2450 3400 2450 +Wire Wire Line + 4200 2350 3400 2350 +Wire Wire Line + 4200 2250 3400 2250 +Text GLabel 3400 2250 0 50 BiDi ~ 0 +ICE40_GPIO_ARM_3 +Text GLabel 3400 2350 0 50 BiDi ~ 0 +ICE40_GPIO_ARM_0 +Text GLabel 3400 2450 0 50 BiDi ~ 0 +ICE40_GPIO_ARM_2 +Text GLabel 3400 2550 0 50 BiDi ~ 0 +ICE40_GPIO_ARM_1 +Wire Wire Line + 4200 8200 3400 8200 +Wire Wire Line + 4200 8300 3400 8300 +Wire Wire Line + 4200 8400 3400 8400 +Wire Wire Line + 4200 8600 3400 8600 +Text GLabel 3400 8200 0 50 BiDi ~ 0 +ICE40_GPIO_FPGA_4 +Text GLabel 3400 8300 0 50 BiDi ~ 0 +ICE40_GPIO_FPGA_5 +Text GLabel 3400 8400 0 50 BiDi ~ 0 +ICE40_GPIO_FPGA_6 +Text GLabel 3400 8600 0 50 BiDi ~ 0 +ICE40_GPIO_FPGA_7 +Text GLabel 8300 9400 0 50 Input ~ 0 +ICE40_JUMPER +Wire Wire Line + 9000 9400 8300 9400 +NoConn ~ 4200 2750 +NoConn ~ 4200 2150 +NoConn ~ 4200 8100 +NoConn ~ 9000 9200 +NoConn ~ 9000 9300 +$EndSCHEMATC |