From d504b392554f0ea17fa947e67cfd772a79d05cc5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= <joachim@secworks.se>
Date: Tue, 16 Oct 2018 11:22:13 +0200
Subject: (1) Added register missing from reset code. (2) Cleaned up reset
 constants. (3) Added missing wire declaration in testbench.

---
 src/tb/tb_mkmif_core.v | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/tb/tb_mkmif_core.v')

diff --git a/src/tb/tb_mkmif_core.v b/src/tb/tb_mkmif_core.v
index 766bc12..9452bbf 100644
--- a/src/tb/tb_mkmif_core.v
+++ b/src/tb/tb_mkmif_core.v
@@ -57,6 +57,7 @@ module tb_mkmif_core();
   reg           tb_clk;
   reg           tb_reset_n;
   wire          tb_spi_sclk;
+  wire          tb_cs_n;
   wire          tb_spi_do;
   wire          tb_spi_di;
   reg           tb_read_op;
-- 
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