(1) Added register missing from reset code. (2) Cleaned up reset constants. (3) Added missing wire declaration in testbench.HEADmaster

1 files changed, 1 insertions, 0 deletions

diff --git a/src/rtl/mkmif.v b/src/rtl/mkmif.v
index 4f44878..55d9678 100644
--- a/src/rtl/mkmif.v
+++ b/src/rtl/mkmif.v
@@ -154,6 +154,7 @@ module mkmif(
         begin
           read_op_reg    <= 1'h0;
           write_op_reg   <= 1'h0;
+          init_op_reg    <= 1'h0;
           addr_reg       <= 16'h0;
           sclk_div_reg   <= DEFAULT_SCLK_DIV;
           write_data_reg <= 32'h0;