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2018-09-04Updated rtl and tb to support parameterized memory size.Joachim Strömbergson
2018-09-04Updated testbench to handle parameterized core.Joachim Strömbergson
2018-09-04Updated testbench to work with the parameterized memory.Joachim Strömbergson
2018-08-23Adding top level defines for setting size and address bits.Joachim Strömbergson
2018-08-16Adding delay cycle to API regs to match the latency for accessing the ↵Joachim Strömbergson
blockRAM. Added test case that checks access to the API regs.
2018-08-15Fix some misleading messages, and enable all tests.Paul Selkirk
2018-07-06(1) Updated version to reflect status. (2) Minor fix after running sim in ↵Joachim Strömbergson
ModelSim.
2018-07-06Adding test case for 4096 bit unwrap. Testcase passed! We have unwrap.Joachim Strömbergson
2018-07-06Debugged key unwrap. First testcase for unwerap passed. Added some more ↵Joachim Strömbergson
debug outputs.
2018-07-06(1) Fixed dump of core_addr in testbench to actually show the core_addr. ↵Joachim Strömbergson
Fixed boundaries for the block counter. Now we don't read mem out of bounds.
2018-07-05Fixing block counter init bug. Enabling detailed debugging. Fixing minor nits.Joachim Strömbergson
2018-07-05Fixed minor details in unwrap test case. Enabled unwrap test case.Joachim Strömbergson
2018-07-05Adding unwrap test case.Joachim Strömbergson
2018-07-05Adding wrap test case with 4096 bit plaintext from NIST. Test result matches ↵Joachim Strömbergson
model.
2018-07-05We haz keywrap! Time to add more testcases and make them self testing. Oh ↵Joachim Strömbergson
and implement unwrap.
2018-07-05Fixed memory word order. Fixed a number of bugs. First block encrypted ↵Joachim Strömbergson
correctly. A state is wrong and memory is read too far.
2018-07-05Removed the streaming interface in favor of a normal address based ↵Joachim Strömbergson
interface. A bit more kludgy, esp since we need to use bank switching to be able to provide enough address space. But this removes a possible problem of the streaming address counter running wild.
2018-07-03Adding more dump outputs. wrap does not yet work, but one can see when ↵Joachim Strömbergson
things go bad and where the isssues are.
2018-07-03Good news: The core peformcs all AES operations and stops after correct ↵Joachim Strömbergson
number of operations. Bad news: All values are wrong.
2018-07-03Debugged a lot of minor errors and added a lot of debug functions. Things ↵Joachim Strömbergson
are starting to work. As in AES is actually initialized and used.
2018-07-03Add support to dump contents of memory to check that data has been written ↵Joachim Strömbergson
correctly.
2018-07-03Added test case with vectors from NIST KWP AE. Test fails. But at least it ↵Joachim Strömbergson
doesn't hang. Now for some bug hunting.
2018-07-03Adding additional test code to verify that core read-modify-write and api ↵Joachim Strömbergson
rread works correctly.
2018-07-03Added first tasks to test api write and core read. Everything works as expected.Joachim Strömbergson
2018-07-01Connected the dut in the core testbench.Joachim Strömbergson
2018-06-29Connected the keymem dut into the testbench.Joachim Strömbergson
2018-06-29Adding more tasks for tb infrastructure.Joachim Strömbergson
2018-06-29Adding dut to top level testbench. Adding API definitions. Adding tasks to ↵Joachim Strömbergson
read and write words from and to the dut API.
2018-06-28Minor speling erorr fix.Joachim Strömbergson
2018-06-27(1) Adding initial version of top level testbench. (2) Updating Makefile to ↵Joachim Strömbergson
be able to bild and run top level simulation as well as linting all rtl code.
2018-06-26Adding more functionality in the core. Updated Makefile to build and ↵Joachim Strömbergson
simulate with the AES core. Minor update to header and README. Clarified that it is RFC 5649 we are implementing.
2018-06-19Adding initial version of repo and design for core implementing aes key wrap.Joachim Strömbergson